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Searched refs:config_base (Results 1 – 25 of 53) sorted by relevance

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/Linux-v5.10/arch/arm/kernel/
Dperf_event_v7.c902 armv7_pmnc_write_evtsel(idx, hwc->config_base); in armv7pmu_enable_event()
1038 unsigned long evtype = hwc->config_base & ARMV7_EVTYPE_EVENT; in armv7pmu_get_event_idx()
1073 unsigned long config_base = 0; in armv7pmu_set_event_filter() local
1078 config_base |= ARMV7_EXCLUDE_USER; in armv7pmu_set_event_filter()
1080 config_base |= ARMV7_EXCLUDE_PL1; in armv7pmu_set_event_filter()
1082 config_base |= ARMV7_INCLUDE_HYP; in armv7pmu_set_event_filter()
1088 event->config_base = config_base; in armv7pmu_set_event_filter()
1415 static void krait_evt_setup(int idx, u32 config_base) in krait_evt_setup() argument
1420 unsigned int region = EVENT_REGION(config_base); in krait_evt_setup()
1421 unsigned int group = EVENT_GROUP(config_base); in krait_evt_setup()
[all …]
Dperf_event_xscale.c219 evt = (hwc->config_base << XSCALE1_COUNT0_EVT_SHFT) | in xscale1pmu_enable_event()
224 evt = (hwc->config_base << XSCALE1_COUNT1_EVT_SHFT) | in xscale1pmu_enable_event()
279 if (XSCALE_PERFCTR_CCNT == hwc->config_base) { in xscale1pmu_get_event_idx()
568 evtsel |= hwc->config_base << XSCALE2_COUNT0_EVT_SHFT; in xscale2pmu_enable_event()
573 evtsel |= hwc->config_base << XSCALE2_COUNT1_EVT_SHFT; in xscale2pmu_enable_event()
578 evtsel |= hwc->config_base << XSCALE2_COUNT2_EVT_SHFT; in xscale2pmu_enable_event()
583 evtsel |= hwc->config_base << XSCALE2_COUNT3_EVT_SHFT; in xscale2pmu_enable_event()
Dperf_event_v6.c282 evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT0_SHIFT) | in armv6pmu_enable_event()
286 evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT1_SHIFT) | in armv6pmu_enable_event()
393 if (ARMV6_PERFCTR_CPU_CYCLES == hwc->config_base) { in armv6pmu_get_event_idx()
/Linux-v5.10/arch/arm/mach-bcm/
Dbcm63xx_smp.c37 unsigned long config_base; in scu_a9_enable() local
47 config_base = scu_a9_get_base(); in scu_a9_enable()
48 if (!config_base) { in scu_a9_enable()
53 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
56 config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
Dplatsmp.c49 unsigned long config_base; in scu_a9_enable() local
58 config_base = scu_a9_get_base(); in scu_a9_enable()
59 if (!config_base) { in scu_a9_enable()
64 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
67 config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
/Linux-v5.10/arch/s390/kernel/
Dperf_cpum_cf.c46 switch (hwc->config_base) { in validate_ctr_version()
108 ctrs_state = cpumf_ctr_ctl[hwc->config_base]; in validate_ctr_auth()
267 hwc->config_base = set; in __hw_perf_event_init()
379 ctr_set_enable(&cpuhw->state, hwc->config_base); in cpumf_pmu_start()
380 ctr_set_start(&cpuhw->state, hwc->config_base); in cpumf_pmu_start()
390 atomic_inc(&cpuhw->ctr_set[hwc->config_base]); in cpumf_pmu_start()
403 if (!atomic_dec_return(&cpuhw->ctr_set[hwc->config_base])) in cpumf_pmu_stop()
404 ctr_set_stop(&cpuhw->state, hwc->config_base); in cpumf_pmu_stop()
427 ctr_set_enable(&cpuhw->state, event->hw.config_base); in cpumf_pmu_add()
452 if (!atomic_read(&cpuhw->ctr_set[event->hw.config_base])) in cpumf_pmu_del()
[all …]
Dperf_cpum_cf_diag.c208 event->hw.config_base = 0; in __hw_perf_event_init()
221 event->hw.config_base |= cpumf_ctr_ctl[i]; in __hw_perf_event_init()
225 if (!event->hw.config_base) { in __hw_perf_event_init()
236 __func__, err, event->hw.config_base); in __hw_perf_event_init()
536 ctr_set_multiple_enable(&cpuhw->state, hwc->config_base); in cf_diag_start()
539 event->hw.config_base); in cf_diag_start()
540 ctr_set_multiple_start(&cpuhw->state, hwc->config_base); in cf_diag_start()
555 ctr_set_multiple_stop(&cpuhw->state, hwc->config_base); in cf_diag_stop()
558 event->hw.config_base); in cf_diag_stop()
559 if (cf_diag_diffctr(csd, event->hw.config_base)) in cf_diag_stop()
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/Linux-v5.10/arch/arm64/kernel/
Dperf_event.c588 armv8pmu_write_evtype(idx - 1, hwc->config_base); in armv8pmu_write_event_type()
592 write_sysreg(hwc->config_base, pmccfiltr_el0); in armv8pmu_write_event_type()
594 armv8pmu_write_evtype(idx, hwc->config_base); in armv8pmu_write_event_type()
846 unsigned long evtype = hwc->config_base & ARMV8_PMU_EVTYPE_EVENT; in armv8pmu_get_event_idx()
880 unsigned long config_base = 0; in armv8pmu_set_event_filter() local
893 config_base |= ARMV8_PMU_INCLUDE_EL2; in armv8pmu_set_event_filter()
895 config_base |= ARMV8_PMU_EXCLUDE_EL1; in armv8pmu_set_event_filter()
897 config_base |= ARMV8_PMU_EXCLUDE_EL0; in armv8pmu_set_event_filter()
900 config_base |= ARMV8_PMU_INCLUDE_EL2; in armv8pmu_set_event_filter()
907 config_base |= ARMV8_PMU_EXCLUDE_EL1; in armv8pmu_set_event_filter()
[all …]
/Linux-v5.10/arch/x86/events/zhaoxin/
Dcore.c296 rdmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_disable_fixed()
298 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_disable_fixed()
305 if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) { in zhaoxin_pmu_disable_event()
332 rdmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_enable_fixed()
335 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_enable_fixed()
342 if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) { in zhaoxin_pmu_enable_event()
/Linux-v5.10/arch/x86/events/amd/
Dibs.c311 hwc->config_base = perf_ibs->msr; in perf_ibs_init()
366 rdmsrl(event->hw.config_base, *config); in perf_ibs_event_update()
377 wrmsrl(hwc->config_base, tmp & ~perf_ibs->enable_mask); in perf_ibs_enable_event()
379 wrmsrl(hwc->config_base, tmp | perf_ibs->enable_mask); in perf_ibs_enable_event()
394 wrmsrl(hwc->config_base, config); in perf_ibs_disable_event()
396 wrmsrl(hwc->config_base, config); in perf_ibs_disable_event()
452 rdmsrl(hwc->config_base, config); in perf_ibs_stop()
619 msr = hwc->config_base; in perf_ibs_handle_irq()
Duncore.c109 wrmsrl(hwc->config_base, (hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE)); in amd_uncore_start()
117 wrmsrl(hwc->config_base, hwc->config); in amd_uncore_stop()
156 hwc->config_base = uncore->msr_base + (2 * hwc->idx); in amd_uncore_add()
/Linux-v5.10/drivers/perf/
Dthunderx2_pmu.c332 hwc->config_base = (unsigned long)tx2_pmu->base in init_cntr_base_l3c()
347 hwc->config_base = (unsigned long)tx2_pmu->base in init_cntr_base_dmc()
362 hwc->config_base = (unsigned long)tx2_pmu->base in init_cntr_base_ccpi2()
378 reg_writel(val, hwc->config_base); in uncore_start_event_l3c()
385 reg_writel(0, event->hw.config_base); in uncore_stop_event_l3c()
405 val = reg_readl(hwc->config_base); in uncore_start_event_dmc()
408 reg_writel(val, hwc->config_base); in uncore_start_event_dmc()
425 val = reg_readl(hwc->config_base); in uncore_stop_event_dmc()
427 reg_writel(val, hwc->config_base); in uncore_stop_event_dmc()
445 GET_EVENTID(event, emask)), hwc->config_base); in uncore_start_event_ccpi2()
Dqcom_l2_pmu.c347 if (hwc->config_base == L2CYCLE_CTR_RAW_CODE) { in l2_cache_get_event_idx()
364 group = L2_EVT_GROUP(hwc->config_base); in l2_cache_get_event_idx()
381 if (hwc->config_base != L2CYCLE_CTR_RAW_CODE) in l2_cache_clear_event_idx()
382 clear_bit(L2_EVT_GROUP(hwc->config_base), cluster->used_groups); in l2_cache_clear_event_idx()
530 hwc->config_base = event->attr.config; in l2_cache_event_init()
555 if (hwc->config_base == L2CYCLE_CTR_RAW_CODE) { in l2_cache_event_start()
558 config = hwc->config_base; in l2_cache_event_start()
Darm-ccn.c687 hw->config_base = bit; in arm_ccn_pmu_event_alloc()
708 clear_bit(hw->config_base, source->xp.dt_cmp_mask); in arm_ccn_pmu_event_release()
710 clear_bit(hw->config_base, source->pmu_events_mask); in arm_ccn_pmu_event_release()
954 unsigned long wp = hw->config_base; in arm_ccn_pmu_xp_watchpoint_config()
1004 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__XP_PMU_EVENT(hw->config_base); in arm_ccn_pmu_xp_event_config()
1012 CCN_XP_PMU_EVENT_SEL__ID__SHIFT(hw->config_base)); in arm_ccn_pmu_xp_event_config()
1013 val |= id << CCN_XP_PMU_EVENT_SEL__ID__SHIFT(hw->config_base); in arm_ccn_pmu_xp_event_config()
1028 hw->config_base); in arm_ccn_pmu_node_event_config()
1048 CCN_HNF_PMU_EVENT_SEL__ID__SHIFT(hw->config_base)); in arm_ccn_pmu_node_event_config()
1050 CCN_HNF_PMU_EVENT_SEL__ID__SHIFT(hw->config_base); in arm_ccn_pmu_node_event_config()
/Linux-v5.10/arch/nds32/kernel/
Dperf_event_cpu.c310 unsigned long config_base = 0; in nds32_pmu_set_event_filter() local
324 config_base |= no_user_tracing; in nds32_pmu_set_event_filter()
327 config_base |= no_kernel_tracing; in nds32_pmu_set_event_filter()
333 event->config_base |= config_base; in nds32_pmu_set_event_filter()
445 hwc->config_base = 0; in nds32_pmu_enable_event()
448 evnum = hwc->config_base; in nds32_pmu_enable_event()
567 unsigned long evtype = hwc->config_base & SOFTWARE_EVENT_MASK; in nds32_pmu_get_event_idx()
817 hwc->config_base = 0; in __hw_perf_event_init()
835 hwc->config_base |= (unsigned long)mapping; in __hw_perf_event_init()
/Linux-v5.10/arch/x86/events/intel/
Dp6.c164 (void)wrmsrl_safe(hwc->config_base, val); in p6_pmu_disable_event()
181 (void)wrmsrl_safe(hwc->config_base, val); in p6_pmu_enable_event()
Duncore_nhmex.c242 wrmsrl(event->hw.config_base, 0); in nhmex_uncore_msr_disable_event()
250 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0); in nhmex_uncore_msr_enable_event()
252 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22); in nhmex_uncore_msr_enable_event()
254 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0); in nhmex_uncore_msr_enable_event()
387 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 | in nhmex_bbox_msr_enable_event()
474 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22); in nhmex_sbox_msr_enable_event()
862 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0); in nhmex_mbox_msr_enable_event()
1147 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 | in nhmex_rbox_msr_enable_event()
Dknc.c185 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); in knc_pmu_disable_event()
196 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); in knc_pmu_enable_event()
Duncore_snb.c146 wrmsrl(hwc->config_base, hwc->config | SNB_UNC_CTL_EN); in snb_uncore_msr_enable_event()
148 wrmsrl(hwc->config_base, SNB_UNC_CTL_EN); in snb_uncore_msr_enable_event()
153 wrmsrl(event->hw.config_base, 0); in snb_uncore_msr_disable_event()
1097 wrmsrl(hwc->config_base, hwc->config | SNB_UNC_CTL_EN); in nhm_uncore_msr_enable_event()
1099 wrmsrl(hwc->config_base, NHM_UNC_FIXED_CTR_CTL_EN); in nhm_uncore_msr_enable_event()
/Linux-v5.10/arch/powerpc/perf/
Dcore-fsl-emb.c340 write_pmlca(i, event->hw.config_base); in fsl_emb_pmu_add()
549 event->hw.config_base = PMLCA_CE | PMLCA_FCM1 | in fsl_emb_pmu_event_init()
553 event->hw.config_base |= PMLCA_FCU; in fsl_emb_pmu_event_init()
555 event->hw.config_base |= PMLCA_FCS; in fsl_emb_pmu_event_init()
/Linux-v5.10/drivers/pci/controller/
Dpci-v3-semi.c241 void __iomem *config_base; member
380 return v3->config_base + address + offset; in v3_map_bus()
760 v3->config_base = devm_ioremap_resource(dev, regs); in v3_pci_probe()
761 if (IS_ERR(v3->config_base)) in v3_pci_probe()
762 return PTR_ERR(v3->config_base); in v3_pci_probe()
/Linux-v5.10/arch/alpha/kernel/
Dperf_event.c200 event[0]->hw.config_base = config; in ev67_check_constraints()
203 event[1]->hw.config_base = config; in ev67_check_constraints()
424 cpuc->config = cpuc->event[0]->hw.config_base; in maybe_change_configuration()
663 hwc->config_base = 0; in __hw_perf_event_init()
/Linux-v5.10/arch/s390/include/asm/
Dperf_event.h72 #define SAMPL_FLAGS(hwc) ((hwc)->config_base)
/Linux-v5.10/arch/mips/kernel/
Dperf_event_mipsxx.c358 (evt->config_base & M_PERFCTL_CONFIG_MASK) | in mipsxx_pmu_enable_event()
363 (evt->config_base & M_PERFCTL_CONFIG_MASK) | in mipsxx_pmu_enable_event()
1570 hwc->config_base = MIPS_PERFCTRL_IE; in __hw_perf_event_init()
1577 hwc->config_base |= MIPS_PERFCTRL_U; in __hw_perf_event_init()
1579 hwc->config_base |= MIPS_PERFCTRL_K; in __hw_perf_event_init()
1581 hwc->config_base |= MIPS_PERFCTRL_EXL; in __hw_perf_event_init()
1584 hwc->config_base |= MIPS_PERFCTRL_S; in __hw_perf_event_init()
1586 hwc->config_base &= M_PERFCTL_CONFIG_MASK; in __hw_perf_event_init()
/Linux-v5.10/drivers/media/dvb-core/
Ddvb_ca_en50221.c94 u32 config_base; member
517 sl->config_base = 0; in dvb_ca_en50221_parse_attributes()
519 sl->config_base |= (tuple[2 + i] << (8 * i)); in dvb_ca_en50221_parse_attributes()
583 manfid, devid, sl->config_base, sl->config_option); in dvb_ca_en50221_parse_attributes()
603 ca->pub->write_attribute_mem(ca->pub, slot, sl->config_base, in dvb_ca_en50221_set_configoption()
608 sl->config_base); in dvb_ca_en50221_set_configoption()

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