Searched refs:clkreg (Results 1 – 4 of 4) sorted by relevance
148 u8 clkreg; in ftide010_set_dmamode() local161 clkreg = readb(ftide->base + FTIDE010_CLK_MOD); in ftide010_set_dmamode()162 clkreg &= ~udma_en_mask; in ftide010_set_dmamode()163 clkreg &= ~f66m_en_mask; in ftide010_set_dmamode()170 clkreg |= udma_en_mask; in ftide010_set_dmamode()172 clkreg |= f66m_en_mask; in ftide010_set_dmamode()185 clkreg, timreg); in ftide010_set_dmamode()187 writeb(clkreg, ftide->base + FTIDE010_CLK_MOD); in ftide010_set_dmamode()195 clkreg |= f66m_en_mask; in ftide010_set_dmamode()204 clkreg, timreg); in ftide010_set_dmamode()[all …]
137 .clkreg = MCI_CLK_ENABLE,163 .clkreg = MCI_CLK_ENABLE,197 .clkreg = MCI_CLK_ENABLE,232 .clkreg = MCI_CLK_ENABLE,309 .clkreg = MCI_CLK_ENABLE,406 u32 clk = variant->clkreg; in mmci_set_clkreg()
321 unsigned int clkreg; member
7988 u32 clkreg; in bnx2_get_pci_speed() local7992 clkreg = BNX2_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS); in bnx2_get_pci_speed()7994 clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET; in bnx2_get_pci_speed()7995 switch (clkreg) { in bnx2_get_pci_speed()
