Searched refs:clkcon (Results 1 – 2 of 2) sorted by relevance
108 u32 clkcon; in spdif_snd_txctrl() local112 clkcon = readl(regs + CLKCON) & CLKCTL_MASK; in spdif_snd_txctrl()114 writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON); in spdif_snd_txctrl()116 writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON); in spdif_snd_txctrl()123 u32 clkcon; in spdif_set_sysclk() local127 clkcon = readl(spdif->regs + CLKCON); in spdif_set_sysclk()130 clkcon &= ~CLKCTL_MCLK_EXT; in spdif_set_sysclk()132 clkcon |= CLKCTL_MCLK_EXT; in spdif_set_sysclk()134 writel(clkcon, spdif->regs + CLKCON); in spdif_set_sysclk()184 u32 con, clkcon, cstas; in spdif_hw_params() local[all …]
156 assigned-clocks = <&clkcon 0>, <&pll 2>;161 In this example the <&pll 2> clock is set as parent of clock <&clkcon 0> and
