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Searched refs:clk_id (Results 1 – 25 of 264) sorted by relevance

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/Linux-v5.10/drivers/clk/zynqmp/
Dpll.c20 u32 clk_id; member
49 u32 clk_id = clk->clk_id; in zynqmp_pll_get_mode() local
54 ret = zynqmp_pm_get_pll_frac_mode(clk_id, ret_payload); in zynqmp_pll_get_mode()
70 u32 clk_id = clk->clk_id; in zynqmp_pll_set_mode() local
80 ret = zynqmp_pm_set_pll_frac_mode(clk_id, mode); in zynqmp_pll_set_mode()
133 u32 clk_id = clk->clk_id; in zynqmp_pll_recalc_rate() local
140 ret = zynqmp_pm_clock_getdivider(clk_id, &fbdiv); in zynqmp_pll_recalc_rate()
147 zynqmp_pm_get_pll_frac_data(clk_id, ret_payload); in zynqmp_pll_recalc_rate()
170 u32 clk_id = clk->clk_id; in zynqmp_pll_set_rate() local
184 ret = zynqmp_pm_clock_setdivider(clk_id, m); in zynqmp_pll_set_rate()
[all …]
Dclk-gate-zynqmp.c23 u32 clk_id; member
38 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_enable() local
41 ret = zynqmp_pm_clock_enable(clk_id); in zynqmp_clk_gate_enable()
58 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_disable() local
61 ret = zynqmp_pm_clock_disable(clk_id); in zynqmp_clk_gate_disable()
78 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_is_enabled() local
81 ret = zynqmp_pm_clock_getstate(clk_id, &state); in zynqmp_clk_gate_is_enabled()
107 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id, in zynqmp_clk_register_gate() argument
131 gate->clk_id = clk_id; in zynqmp_clk_register_gate()
Dclk-mux-zynqmp.c32 u32 clk_id; member
47 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_get_parent() local
51 ret = zynqmp_pm_clock_getparent(clk_id, &val); in zynqmp_clk_mux_get_parent()
71 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_set_parent() local
74 ret = zynqmp_pm_clock_setparent(clk_id, index); in zynqmp_clk_mux_set_parent()
104 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, in zynqmp_clk_register_mux() argument
128 mux->clk_id = clk_id; in zynqmp_clk_register_mux()
Dclkc.c78 u32 clk_id; member
121 static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id,
145 static inline int zynqmp_is_valid_clock(u32 clk_id) in zynqmp_is_valid_clock() argument
147 if (clk_id >= clock_max_idx) in zynqmp_is_valid_clock()
150 return clock[clk_id].valid; in zynqmp_is_valid_clock()
160 static int zynqmp_get_clock_name(u32 clk_id, char *clk_name) in zynqmp_get_clock_name() argument
164 ret = zynqmp_is_valid_clock(clk_id); in zynqmp_get_clock_name()
166 strncpy(clk_name, clock[clk_id].clk_name, MAX_NAME_LEN); in zynqmp_get_clock_name()
180 static int zynqmp_get_clock_type(u32 clk_id, u32 *type) in zynqmp_get_clock_type() argument
184 ret = zynqmp_is_valid_clock(clk_id); in zynqmp_get_clock_type()
[all …]
Ddivider.c43 u32 clk_id; member
83 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_recalc_rate() local
88 ret = zynqmp_pm_clock_getdivider(clk_id, &div); in zynqmp_clk_divider_recalc_rate()
169 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_round_rate() local
176 ret = zynqmp_pm_clock_getdivider(clk_id, &bestdiv); in zynqmp_clk_divider_round_rate()
226 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_set_rate() local
243 ret = zynqmp_pm_clock_setdivider(clk_id, div); in zynqmp_clk_divider_set_rate()
266 static u32 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) in zynqmp_clk_get_max_divisor() argument
273 qdata.arg1 = clk_id; in zynqmp_clk_get_max_divisor()
297 u32 clk_id, in zynqmp_clk_register_divider() argument
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Dclk-zynqmp.h36 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
41 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
47 u32 clk_id,
52 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
58 u32 clk_id,
/Linux-v5.10/drivers/clk/keystone/
Dsci-clk.c63 u32 clk_id; member
88 clk->clk_id, enable_ssc, in sci_clk_prepare()
105 clk->clk_id); in sci_clk_unprepare()
109 clk->dev_id, clk->clk_id, ret); in sci_clk_unprepare()
126 clk->clk_id, &req_state, in sci_clk_is_prepared()
131 clk->dev_id, clk->clk_id, ret); in sci_clk_is_prepared()
154 clk->clk_id, &freq); in sci_clk_recalc_rate()
158 clk->dev_id, clk->clk_id, ret); in sci_clk_recalc_rate()
189 clk->clk_id, in sci_clk_determine_rate()
197 clk->dev_id, clk->clk_id, ret); in sci_clk_determine_rate()
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/Linux-v5.10/tools/testing/selftests/timens/
Dtimens.h64 static inline int _settime(clockid_t clk_id, time_t offset) in _settime() argument
69 if (clk_id == CLOCK_MONOTONIC_COARSE || clk_id == CLOCK_MONOTONIC_RAW) in _settime()
70 clk_id = CLOCK_MONOTONIC; in _settime()
72 len = snprintf(buf, sizeof(buf), "%d %ld 0", clk_id, offset); in _settime()
86 static inline int _gettime(clockid_t clk_id, struct timespec *res, bool raw_syscall) in _gettime() argument
91 if (clock_gettime(clk_id, res)) { in _gettime()
92 pr_perror("clock_gettime(%d)", (int)clk_id); in _gettime()
98 err = syscall(SYS_clock_gettime, clk_id, res); in _gettime()
100 pr_perror("syscall(SYS_clock_gettime(%d))", (int)clk_id); in _gettime()
/Linux-v5.10/drivers/soc/mediatek/
Dmtk-scpsys.c81 enum clk_id { enum
129 enum clk_id clk_id[MAX_CLKS]; member
496 for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { in init_scp()
497 struct clk *c = clk[data->clk_id[j]]; in init_scp()
563 .clk_id = {CLK_NONE},
571 .clk_id = {CLK_MM},
581 .clk_id = {CLK_MFG},
590 .clk_id = {CLK_MM},
599 .clk_id = {CLK_MM},
607 .clk_id = {CLK_NONE},
[all …]
/Linux-v5.10/drivers/firmware/arm_scmi/
Dclock.c102 u32 clk_id, struct scmi_clock_info *clk) in scmi_clock_attributes_get() argument
109 sizeof(clk_id), sizeof(*attr), &t); in scmi_clock_attributes_get()
113 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_attributes_get()
139 scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id, in scmi_clock_describe_rates_get() argument
160 clk_desc->id = cpu_to_le32(clk_id); in scmi_clock_describe_rates_get()
216 scmi_clock_rate_get(const struct scmi_handle *handle, u32 clk_id, u64 *value) in scmi_clock_rate_get() argument
226 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_rate_get()
236 static int scmi_clock_rate_set(const struct scmi_handle *handle, u32 clk_id, in scmi_clock_rate_set() argument
256 cfg->id = cpu_to_le32(clk_id); in scmi_clock_rate_set()
273 scmi_clock_config_set(const struct scmi_handle *handle, u32 clk_id, u32 config) in scmi_clock_config_set() argument
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/Linux-v5.10/sound/soc/ti/
Domap-dmic.c279 static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id, in omap_dmic_select_fclk() argument
298 if (dmic->sysclk == clk_id) { in omap_dmic_select_fclk()
309 switch (clk_id) { in omap_dmic_select_fclk()
320 dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id); in omap_dmic_select_fclk()
353 dmic->sysclk = clk_id; in omap_dmic_select_fclk()
363 static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id, in omap_dmic_select_outclk() argument
368 if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) { in omap_dmic_select_outclk()
370 clk_id); in omap_dmic_select_outclk()
390 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, in omap_dmic_set_dai_sysclk() argument
396 return omap_dmic_select_fclk(dmic, clk_id, freq); in omap_dmic_set_dai_sysclk()
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/Linux-v5.10/drivers/clk/baikal-t1/
Dclk-ccu-pll.c82 unsigned int clk_id) in ccu_pll_find_desc() argument
89 if (pll && pll->id == clk_id) in ccu_pll_find_desc()
131 unsigned int clk_id; in ccu_pll_of_clk_hw_get() local
133 clk_id = clkspec->args[0]; in ccu_pll_of_clk_hw_get()
134 pll = ccu_pll_find_desc(data, clk_id); in ccu_pll_of_clk_hw_get()
136 pr_info("Invalid PLL clock ID %d specified\n", clk_id); in ccu_pll_of_clk_hw_get()
Dclk-ccu-div.c91 .clk_id = _clk_id \
110 unsigned int clk_id; member
248 unsigned int clk_id) in ccu_div_find_desc() argument
255 if (div && div->id == clk_id) in ccu_div_find_desc()
279 div = ccu_div_find_desc(data, map->clk_id); in ccu_div_reset()
281 pr_err("Invalid clock ID %d in mapping\n", map->clk_id); in ccu_div_reset()
363 unsigned int clk_id; in ccu_div_of_clk_hw_get() local
365 clk_id = clkspec->args[0]; in ccu_div_of_clk_hw_get()
366 div = ccu_div_find_desc(data, clk_id); in ccu_div_of_clk_hw_get()
368 pr_info("Invalid clock ID %d specified\n", clk_id); in ccu_div_of_clk_hw_get()
/Linux-v5.10/drivers/clk/tegra/
Dclk-tegra-audio.c35 int clk_id; member
41 .clk_id = tegra_clk_ ## _name,\
66 int clk_id; member
77 .clk_id = tegra_clk_ ## _name ## _2x,\
181 dt_clk = tegra_lookup_dt_id(info->clk_id, tegra_clks); in tegra_audio_clk_init()
207 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()
231 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()
Dclk.c257 for (; dup_list->clk_id < clk_max; dup_list++) { in tegra_init_dup_clks()
258 clk = clks[dup_list->clk_id]; in tegra_init_dup_clks()
269 for (; tbl->clk_id < clk_max; tbl++) { in tegra_init_from_table()
270 clk = clks[tbl->clk_id]; in tegra_init_from_table()
273 __func__, PTR_ERR(clk), tbl->clk_id); in tegra_init_from_table()
366 struct clk ** __init tegra_lookup_dt_id(int clk_id, in tegra_lookup_dt_id() argument
369 if (tegra_clk[clk_id].present) in tegra_lookup_dt_id()
370 return &clks[tegra_clk[clk_id].dt_id]; in tegra_lookup_dt_id()
/Linux-v5.10/drivers/firmware/
Dti_sci.c940 u32 dev_id, u32 clk_id, in ti_sci_set_clock_state() argument
968 if (clk_id < 255) { in ti_sci_set_clock_state()
969 req->clk_id = clk_id; in ti_sci_set_clock_state()
971 req->clk_id = 255; in ti_sci_set_clock_state()
972 req->clk_id_32 = clk_id; in ti_sci_set_clock_state()
1005 u32 dev_id, u32 clk_id, in ti_sci_cmd_get_clock_state() argument
1036 if (clk_id < 255) { in ti_sci_cmd_get_clock_state()
1037 req->clk_id = clk_id; in ti_sci_cmd_get_clock_state()
1039 req->clk_id = 255; in ti_sci_cmd_get_clock_state()
1040 req->clk_id_32 = clk_id; in ti_sci_cmd_get_clock_state()
[all …]
Dti_sci.h273 u8 clk_id; member
299 u8 clk_id; member
342 u8 clk_id; member
364 u8 clk_id; member
402 u8 clk_id; member
453 u8 clk_id; member
512 u8 clk_id; member
533 u8 clk_id; member
/Linux-v5.10/sound/soc/codecs/
Dadav80x.c537 int clk_id, int source, in adav80x_set_sysclk() argument
544 switch (clk_id) { in adav80x_set_sysclk()
557 if (adav80x->clk_src != clk_id) { in adav80x_set_sysclk()
560 adav80x->clk_src = clk_id; in adav80x_set_sysclk()
561 if (clk_id == ADAV80X_CLK_XTAL) in adav80x_set_sysclk()
562 clk_id = ADAV80X_CLK_XIN; in adav80x_set_sysclk()
564 iclk_ctrl1 = ADAV80X_ICLK_CTRL1_DAC_SRC(clk_id) | in adav80x_set_sysclk()
565 ADAV80X_ICLK_CTRL1_ADC_SRC(clk_id) | in adav80x_set_sysclk()
566 ADAV80X_ICLK_CTRL1_ICLK2_SRC(clk_id); in adav80x_set_sysclk()
567 iclk_ctrl2 = ADAV80X_ICLK_CTRL2_ICLK1_SRC(clk_id); in adav80x_set_sysclk()
[all …]
Dmc13783.c242 int clk_id, unsigned int freq, int dir, in mc13783_set_sysclk() argument
260 if (clk_id == MC13783_CLK_CLIB) in mc13783_set_sysclk()
271 int clk_id, unsigned int freq, int dir) in mc13783_set_sysclk_dac() argument
273 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC); in mc13783_set_sysclk_dac()
277 int clk_id, unsigned int freq, int dir) in mc13783_set_sysclk_codec() argument
279 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC); in mc13783_set_sysclk_codec()
283 int clk_id, unsigned int freq, int dir) in mc13783_set_sysclk_sync() argument
287 ret = mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC); in mc13783_set_sysclk_sync()
291 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC); in mc13783_set_sysclk_sync()
/Linux-v5.10/tools/perf/util/
Dclockid.c55 static int get_clockid_res(clockid_t clk_id, u64 *res_ns) in get_clockid_res() argument
60 if (!clock_getres(clk_id, &res)) in get_clockid_res()
110 const char *clockid_name(clockid_t clk_id) in clockid_name() argument
115 if (cm->clockid == clk_id) in clockid_name()
/Linux-v5.10/drivers/base/regmap/
Dregmap-mmio.c212 const char *clk_id, in regmap_mmio_gen_context() argument
299 if (clk_id == NULL) in regmap_mmio_gen_context()
302 ctx->clk = clk_get(dev, clk_id); in regmap_mmio_gen_context()
322 struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, in __regmap_init_mmio_clk() argument
330 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config); in __regmap_init_mmio_clk()
340 const char *clk_id, in __devm_regmap_init_mmio_clk() argument
348 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config); in __devm_regmap_init_mmio_clk()
/Linux-v5.10/include/linux/firmware/
Dxlnx-zynqmp.h330 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode);
331 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode);
332 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data);
333 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data);
410 static inline int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) in zynqmp_pm_set_pll_frac_mode() argument
414 static inline int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) in zynqmp_pm_get_pll_frac_mode() argument
418 static inline int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) in zynqmp_pm_set_pll_frac_data() argument
422 static inline int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) in zynqmp_pm_get_pll_frac_data() argument
/Linux-v5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c480 uint8_t clk_id, in smu_v11_0_atom_get_smu_clockinfo() argument
488 input.clk_id = clk_id; in smu_v11_0_atom_get_smu_clockinfo()
783 int clk_id; in smu_v11_0_get_max_sustainable_clock() local
789 clk_id = smu_cmn_to_asic_specific_index(smu, in smu_v11_0_get_max_sustainable_clock()
792 if (clk_id < 0) in smu_v11_0_get_max_sustainable_clock()
796 clk_id << 16, clock); in smu_v11_0_get_max_sustainable_clock()
807 clk_id << 16, clock); in smu_v11_0_get_max_sustainable_clock()
1551 int ret = 0, clk_id = 0; in smu_v11_0_get_dpm_ultimate_freq() local
1582 clk_id = smu_cmn_to_asic_specific_index(smu, in smu_v11_0_get_dpm_ultimate_freq()
1585 if (clk_id < 0) { in smu_v11_0_get_dpm_ultimate_freq()
[all …]
/Linux-v5.10/arch/nds32/kernel/vdso/
Dgettimeofday.c193 register clockid_t clk_id asm("$r0") = _clk_id; in clock_getres_fallback()
200 :"r"(clk_id), "r"(res), "i"(__NR_clock_getres) in clock_getres_fallback()
206 notrace int __vdso_clock_getres(clockid_t clk_id, struct __kernel_old_timespec *res) in __vdso_clock_getres() argument
212 switch (clk_id) { in __vdso_clock_getres()
225 return clock_getres_fallback(clk_id, res); in __vdso_clock_getres()
/Linux-v5.10/sound/soc/intel/boards/
Dsof_sdw_rt1308.c99 int clk_id, clk_freq, pll_out; in rt1308_i2s_hw_params() local
102 clk_id = RT1308_PLL_S_MCLK; in rt1308_i2s_hw_params()
108 err = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, pll_out); in rt1308_i2s_hw_params()

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