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Searched refs:cache_is_vivt (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.10/arch/arm/mm/
Dflush.c65 if (cache_is_vivt()) { in flush_cache_mm()
81 if (cache_is_vivt()) { in flush_cache_range()
100 if (cache_is_vivt()) { in flush_cache_page()
131 if (cache_is_vivt()) { in __flush_ptrace_access()
339 if (mapping && cache_is_vivt()) in flush_dcache_page()
359 if (cache_is_vivt() || cache_is_vipt_aliasing()) { in flush_kernel_dcache_page()
402 if (cache_is_vivt()) { in __flush_anon_page()
Dhighmem.c46 if (!cache_is_vivt()) in kmap_atomic_high_prot()
85 if (cache_is_vivt()) in kunmap_atomic_high()
Dfault-armv.c203 if (cache_is_vivt()) in update_mmu_cache()
/Linux-v5.10/arch/arm/include/asm/
Dhighmem.h15 if (cache_is_vivt()) \
Dcacheflush.h296 if ((cache_is_vivt() || cache_is_vipt_aliasing())) in flush_kernel_vmap_range()
301 if ((cache_is_vivt() || cache_is_vipt_aliasing())) in invalidate_kernel_vmap_range()
Dcachetype.h15 #define cache_is_vivt() cacheid_is(CACHEID_VIVT) macro
Dmmu_context.h146 if (cache_is_vivt()) in switch_mm()
/Linux-v5.10/arch/arm/kernel/
Dsetup.c347 cache_is_vivt() ? "VIVT" : in cacheid_init()
350 cache_is_vivt() ? "VIVT" : in cacheid_init()