Searched refs:__aligned_u64 (Results 1 – 25 of 45) sorted by relevance
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120 __aligned_u64 element;126 __aligned_u64 cq_handle;153 __aligned_u64 response;160 __aligned_u64 response;161 __aligned_u64 driver_data[0];167 __aligned_u64 driver_data[0];171 __aligned_u64 response;172 __aligned_u64 driver_data[0];176 __aligned_u64 fw_ver;179 __aligned_u64 max_mr_size;[all …]
147 __aligned_u64 buf_addr;158 __aligned_u64 buf_addr;164 __aligned_u64 buf_addr;175 __aligned_u64 rbuf_addr;176 __aligned_u64 sbuf_addr;179 __aligned_u64 qp_addr;189 __aligned_u64 swap_val;190 __aligned_u64 compare_val;191 __aligned_u64 swap_mask;192 __aligned_u64 compare_mask;[all …]
58 __aligned_u64 key;59 __aligned_u64 gts_key;60 __aligned_u64 memsize;73 __aligned_u64 ma_sync_key;74 __aligned_u64 sq_key;75 __aligned_u64 rq_key;76 __aligned_u64 sq_db_gts_key;77 __aligned_u64 rq_db_gts_key;78 __aligned_u64 sq_memsize;79 __aligned_u64 rq_memsize;[all …]
66 __aligned_u64 db_pa;87 __aligned_u64 rsvd1;96 __aligned_u64 addr;97 __aligned_u64 len;104 __aligned_u64 db_rec_addr;113 __aligned_u64 sq_addr;116 __aligned_u64 sq_len;120 __aligned_u64 rq_addr;123 __aligned_u64 rq_len;142 __aligned_u64 sq_db_rec_addr;[all …]
58 __aligned_u64 ah_tbl_page;63 __aligned_u64 rsvd1;64 __aligned_u64 rsvd2;90 __aligned_u64 page_addr[MAX_CQ_PAGES];91 __aligned_u64 db_page_addr;95 __aligned_u64 rsvd1;96 __aligned_u64 rsvd2;118 __aligned_u64 sq_page_addr[MAX_QP_PAGES];119 __aligned_u64 rq_page_addr[MAX_QP_PAGES];120 __aligned_u64 db_page_addr;[all …]
40 __aligned_u64 buf_addr;41 __aligned_u64 db_addr;47 __aligned_u64 cqn; /* Only 32 bits used, 64 for compat */48 __aligned_u64 cap_flags;52 __aligned_u64 buf_addr;53 __aligned_u64 db_addr;54 __aligned_u64 que_addr;63 __aligned_u64 buf_addr;64 __aligned_u64 db_addr;69 __aligned_u64 sdb_addr;[all …]
20 __aligned_u64 cq_key;28 __aligned_u64 sq_key;29 __aligned_u64 rq_key;46 __aligned_u64 srq_key;80 __aligned_u64 laddr;108 __aligned_u64 id;115 __aligned_u64 raddr;116 __aligned_u64 base_mr;120 __aligned_u64 access;126 __aligned_u64 id;[all …]
80 __aligned_u64 buf_addr;81 __aligned_u64 db_addr;90 __aligned_u64 buf_addr;94 __aligned_u64 buf_addr;95 __aligned_u64 db_addr;104 __aligned_u64 rx_hash_fields_mask; /* Use enum mlx4_ib_rx_hash_fields */113 __aligned_u64 buf_addr;114 __aligned_u64 db_addr;123 __aligned_u64 buf_addr;124 __aligned_u64 db_addr;[all …]
91 __aligned_u64 uid;92 __aligned_u64 response;103 __aligned_u64 response;113 __aligned_u64 response;154 __aligned_u64 response;160 __aligned_u64 node_guid;172 __aligned_u64 node_guid;231 __aligned_u64 uid;251 __aligned_u64 response;262 __aligned_u64 response; /* rdma_ucm_create_id_resp */[all …]
97 __aligned_u64 lib_caps;148 __aligned_u64 hca_core_clock_offset;170 __aligned_u64 rx_hash_fields_mask; /* enum mlx5_rx_hash_fields */276 __aligned_u64 buf_addr;277 __aligned_u64 db_addr;293 __aligned_u64 buf_addr;300 __aligned_u64 buf_addr;301 __aligned_u64 db_addr;314 __aligned_u64 buf_addr;315 __aligned_u64 db_addr;[all …]
76 __aligned_u64 wr_id;86 __aligned_u64 remote_addr;91 __aligned_u64 remote_addr;92 __aligned_u64 compare_add;93 __aligned_u64 swap;106 __aligned_u64 reserved;115 __aligned_u64 addr;121 __aligned_u64 offset;144 __aligned_u64 iova;155 __aligned_u64 wr_id;[all …]
62 __aligned_u64 comp_mask;79 __aligned_u64 cq_va;80 __aligned_u64 cq_handle;91 __aligned_u64 qpsva;92 __aligned_u64 qprva;93 __aligned_u64 qp_handle;102 __aligned_u64 srqva;103 __aligned_u64 srq_handle;
65 __aligned_u64 q_mmap_key;66 __aligned_u64 q_mmap_size;90 __aligned_u64 rq_mmap_key;91 __aligned_u64 rq_mmap_size;92 __aligned_u64 rq_db_mmap_key;93 __aligned_u64 sq_db_mmap_key;94 __aligned_u64 llq_desc_mmap_key;
64 __aligned_u64 user_cq_buffer;65 __aligned_u64 user_shadow_area;69 __aligned_u64 user_wqe_buffers;70 __aligned_u64 user_compl_ctx;73 __aligned_u64 user_sq_phb; /* place for VA of the sq phb buff */74 __aligned_u64 user_rq_phb; /* place for VA of the rq phb buff */
77 __aligned_u64 arm_db_page;78 __aligned_u64 set_db_page;96 __aligned_u64 db_page;107 __aligned_u64 sq_db_page;108 __aligned_u64 rq_db_page;
41 #define RDMA_UAPI_PTR(_type, _name) __aligned_u64 _name153 __aligned_u64 iv;200 __aligned_u64 hard_limit_pkts;261 __aligned_u64 gid[2];
82 __aligned_u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */101 __aligned_u64 vaddr;103 __aligned_u64 tidlist;134 __aligned_u64 sc_credits_addr;139 __aligned_u64 pio_bufbase_sop;144 __aligned_u64 pio_bufbase;146 __aligned_u64 rcvhdr_bufbase;148 __aligned_u64 rcvegr_bufbase;150 __aligned_u64 sdma_comp_bufbase;158 __aligned_u64 user_regbase;[all …]
27 __aligned_u64 flags;28 __aligned_u64 pidfd;29 __aligned_u64 child_tid;30 __aligned_u64 parent_tid;31 __aligned_u64 exit_signal;32 __aligned_u64 stack;33 __aligned_u64 stack_size;34 __aligned_u64 tls;38 __aligned_u64 set_tid;39 __aligned_u64 set_tid_size;[all …]
93 __aligned_u64 flags;94 __aligned_u64 pidfd;95 __aligned_u64 child_tid;96 __aligned_u64 parent_tid;97 __aligned_u64 exit_signal;98 __aligned_u64 stack;99 __aligned_u64 stack_size;100 __aligned_u64 tls;101 __aligned_u64 set_tid;102 __aligned_u64 set_tid_size;[all …]
509 __aligned_u64 key;511 __aligned_u64 value;512 __aligned_u64 next_key;518 __aligned_u64 in_batch; /* start batch,521 __aligned_u64 out_batch; /* output: next start batch */522 __aligned_u64 keys;523 __aligned_u64 values;537 __aligned_u64 insns;538 __aligned_u64 license;541 __aligned_u64 log_buf; /* user supplied buffer */[all …]
72 __aligned_u64 tx_packets;73 __aligned_u64 tx_bytes;74 __aligned_u64 tx_errors;75 __aligned_u64 rx_packets;76 __aligned_u64 rx_bytes;77 __aligned_u64 rx_seq_discards;78 __aligned_u64 rx_oos_packets;79 __aligned_u64 rx_errors;
92 __aligned_u64 bits;93 __aligned_u64 mask;129 __aligned_u64 flags;130 __aligned_u64 values;145 __aligned_u64 mask;163 __aligned_u64 flags;224 __aligned_u64 flags;254 __aligned_u64 timestamp_ns;285 __aligned_u64 timestamp_ns;
31 __aligned_u64 diag_inode;106 __aligned_u64 peer_gid; /* Peer GID */107 __aligned_u64 my_gid; /* My GID */108 __aligned_u64 token; /* Token of DMB */109 __aligned_u64 peer_token; /* Token of remote DMBE */
