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Searched refs:_MASKED_BIT_DISABLE (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/i915/gvt/
Dreg.h100 ((_val) & _MASKED_BIT_DISABLE(_b))
Dhandlers.c1847 else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)) in ring_reset_ctl_write()
/Linux-v5.10/drivers/gpu/drm/i915/gt/
Dintel_ring_submission.c308 RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in xcs_resume()
751 *cs++ = _MASKED_BIT_DISABLE( in mi_set_context()
1002 _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE)); in gen6_bsd_submit_request()
Dintel_rc6.c695 _MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH)); in vlv_residency_raw()
Dintel_reset.c536 _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)); in gen8_engine_reset_cancel()
Dintel_engine_cs.c1037 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
Dintel_workarounds.c229 wa_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val); in wa_masked_dis()
Dintel_lrc.c4138 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in enable_execlists()
5225 ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT); in init_common_reg_state()
5229 ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT | in init_common_reg_state()
/Linux-v5.10/drivers/gpu/drm/i915/gt/uc/
Dintel_uc_fw.c484 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
/Linux-v5.10/drivers/gpu/drm/i915/
Dintel_pm.c387 _MASKED_BIT_DISABLE(FW_BLC_SELF_EN); in _intel_set_memory_cxsr()
398 _MASKED_BIT_DISABLE(INSTPM_SELF_EN); in _intel_set_memory_cxsr()
7511 I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); in gen3_init_clock_gating()
7529 _MASKED_BIT_DISABLE(MI_AGPBUSY_830_MODE)); in i85x_init_clock_gating()
Dintel_uncore.c90 #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
Di915_irq.c2674 I915_WRITE(SCPD0, _MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE)); in i915gm_disable_vblank()
Di915_reg.h273 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0)) macro