Searched refs:VIVS_MMUv2_SEC_CONTROL_ENABLE (Results 1 – 2 of 2) sorted by relevance
192 if (gpu_read(gpu, VIVS_MMUv2_SEC_CONTROL) & VIVS_MMUv2_SEC_CONTROL_ENABLE) in etnaviv_iommuv2_restore_sec()220 gpu_write(gpu, VIVS_MMUv2_SEC_CONTROL, VIVS_MMUv2_SEC_CONTROL_ENABLE); in etnaviv_iommuv2_restore_sec()
373 #define VIVS_MMUv2_SEC_CONTROL_ENABLE 0x00000001 macro
