Searched refs:VIVS_HI_CLOCK_CONTROL (Results 1 – 4 of 4) sorted by relevance
/Linux-v5.10/drivers/gpu/drm/etnaviv/ |
D | etnaviv_gpu.c | 460 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock | in etnaviv_gpu_load_clock() 462 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in etnaviv_gpu_load_clock() 475 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_gpu_update_clock() 500 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset() 508 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset() 516 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset() 520 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset() 532 control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_hw_reset() 543 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset() 551 control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_hw_reset() [all …]
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D | etnaviv_perfmon.c | 53 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in pipe_reg_read() 60 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in pipe_reg_read() 68 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in pipe_reg_read()
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D | etnaviv_dump.c | 29 VIVS_HI_CLOCK_CONTROL,
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D | state_hi.xml.h | 56 #define VIVS_HI_CLOCK_CONTROL 0x00000000 macro
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