Searched refs:VCS1 (Results 1 – 11 of 11) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/i915/gvt/ |
| D | mmio_context.c | 127 {VCS1, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
155 [VCS1] = 0xca00,
342 [VCS1] = 0x4268,
399 [VCS1] = 0xca00, in switch_mocs()
|
| D | execlist.c | 52 [VCS1] = VCS2_AS_CONTEXT_SWITCH,
|
| D | interrupt.c | 543 if (HAS_ENGINE(gvt->gt, VCS1)) { in gen8_init_irq()
|
| D | cmd_parser.c | 415 #define R_VCS2 BIT(VCS1)
627 [VCS1] = {
1132 [VCS1] = {
|
| D | handlers.c | 344 engine_mask |= BIT(VCS1); in gdrst_mmio_write()
1821 id = VCS1; in gvt_reg_tlb_control_handler()
1900 if (HAS_ENGINE(gvt->gt, VCS1)) \
|
| /Linux-v5.10/drivers/gpu/drm/i915/ |
| D | i915_pci.c | 603 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
667 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
749 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
770 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
|
| /Linux-v5.10/drivers/gpu/drm/i915/gt/ |
| D | intel_engine_types.h | 114 VCS1, enumerator
|
| D | intel_mocs.c | 409 [VCS1] = __GEN9_VCS1_MOCS0, in mocs_offset()
|
| D | intel_reset.c | 322 [VCS1] = GEN8_GRDOM_MEDIA2, in gen6_reset_engines()
454 [VCS1] = GEN11_GRDOM_MEDIA2, in gen11_reset_engines()
|
| D | intel_engine_cs.c | 99 [VCS1] = {
|
| D | intel_lrc.c | 5127 [VCS1] = GEN8_VCS1_IRQ_SHIFT, in logical_ring_default_irqs()
|
