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Searched refs:VCS0 (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/i915/
Di915_pci.c352 .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
362 .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
371 .platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
402 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
453 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
524 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
535 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
603 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
613 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
667 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
[all …]
Di915_drv.h1629 ENGINE_INSTANCES_MASK(gt, VCS0, I915_MAX_VCS)
Di915_gpu_error.c1172 case VCS0: in engine_record_registers()
Di915_irq.c3933 intel_engine_signal_breadcrumbs(dev_priv->gt.engine[VCS0]); in i965_irq_handler()
/Linux-v5.10/drivers/gpu/drm/i915/gt/
Dintel_engine_types.h113 VCS0, enumerator
117 #define _VCS(n) (VCS0 + (n))
Dintel_engine_user.c159 [VIDEO_DECODE_CLASS] = { VCS0, I915_MAX_VCS }, in legacy_ring_idx()
Dintel_mocs.c408 [VCS0] = __GEN9_VCS0_MOCS0, in mocs_offset()
Dintel_reset.c321 [VCS0] = GEN6_GRDOM_MEDIA, in gen6_reset_engines()
453 [VCS0] = GEN11_GRDOM_MEDIA, in gen11_reset_engines()
Dintel_ring_submission.c111 case VCS0: in set_hwsp()
Dintel_engine_cs.c89 [VCS0] = {
Dintel_lrc.c5126 [VCS0] = GEN8_VCS0_IRQ_SHIFT, in logical_ring_default_irqs()
/Linux-v5.10/drivers/gpu/drm/i915/gvt/
Dmmio_context.c154 [VCS0] = 0xc900,
341 [VCS0] = 0x4264,
398 [VCS0] = 0xc900, in switch_mocs()
Dexeclist.c51 [VCS0] = VCS_AS_CONTEXT_SWITCH,
Dcmd_parser.c414 #define R_VCS1 BIT(VCS0)
594 [VCS0] = {
1127 [VCS0] = {
Dhandlers.c332 engine_mask |= BIT(VCS0); in gdrst_mmio_write()
1818 id = VCS0; in gvt_reg_tlb_control_handler()
/Linux-v5.10/drivers/gpu/drm/i915/gem/
Di915_gem_execbuffer.c2609 [I915_EXEC_BSD] = VCS0,