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Searched refs:VC5_OUT_DIV_CONTROL (Results 1 – 1 of 1) sorted by relevance

/Linux-v5.10/drivers/clk/
Dclk-versaclock5.c75 #define VC5_OUT_DIV_CONTROL(idx) (0x21 + ((idx) * 0x10)) macro
588 regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src); in vc5_clk_out_prepare()
592 VC5_OUT_DIV_CONTROL(hwdata->num), in vc5_clk_out_prepare()
639 regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src); in vc5_clk_out_get_parent()
673 return regmap_update_bits(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), in vc5_clk_out_set_parent()