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Searched refs:TXS (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/Documentation/devicetree/bindings/pci/
Daltera-pcie.txt5 - reg: a list of physical base address and length for TXS and CRA.
/Linux-v5.10/drivers/net/wan/
Dhd64570.h69 #define TXS 0x17 /* TX Clock Source */ macro
Dhd64572.h66 #define TXS 0x13d /* TX clock source */ macro
Dhd64572.c409 sca_out(port->txs, msci + TXS, card); in sca_set_port()
469 sca_out(port->txs, msci + TXS, card); in sca_open()
Dhd64570.c445 sca_out(port->txs, msci + TXS, card); in sca_set_port()
513 sca_out(port->txs, msci + TXS, card); in sca_open()
Dc101.c178 sca_out(txs, MSCI1_OFFSET + TXS, port); in c101_set_iface()
Dpci200syn.c150 sca_out(txs, msci + TXS, card); in pci200_set_iface()
Dpc300too.c152 sca_out(txs, msci + TXS, card); in pc300_set_iface()
Dn2.c202 sca_out(txs, msci + TXS, card); in n2_set_iface()
/Linux-v5.10/drivers/tty/
Dsynclinkmp.c332 #define TXS 0x37 macro
4023 write_reg(info, TXS, 0x40); in enable_loopback()
4037 write_reg(info, TXS, 0x00); in enable_loopback()
4083 write_reg(info, TXS, in set_rate()
4084 (unsigned char)((read_reg(info, TXS) & 0xf0) | BRValue)); in set_rate()
4090 write_reg(info, TXS,0); in set_rate()
4431 write_reg(info, TXS, RegValue); in async_mode()
4602 write_reg(info, TXS, RegValue); in hdlc_mode()