Searched refs:TRCVIPCSSCTLR (Results 1 – 2 of 2) sorted by relevance
42 #define TRCVIPCSSCTLR 0x08C macro
145 drvdata->base + TRCVIPCSSCTLR); in etm4_enable_hw()1197 state->trcvipcssctlr = readl(drvdata->base + TRCVIPCSSCTLR); in etm4_cpu_save()1302 writel_relaxed(state->trcvipcssctlr, drvdata->base + TRCVIPCSSCTLR); in etm4_cpu_restore()
