Searched refs:TRCCIDCCTLR0 (Results 1 – 2 of 2) sorted by relevance
90 #define TRCCIDCCTLR0 0x680 macro
189 writel_relaxed(config->ctxid_mask0, drvdata->base + TRCCIDCCTLR0); in etm4_enable_hw()1242 state->trccidcctlr0 = readl(drvdata->base + TRCCIDCCTLR0); in etm4_cpu_save()1352 writel_relaxed(state->trccidcctlr0, drvdata->base + TRCCIDCCTLR0); in etm4_cpu_restore()
