Searched refs:TLBTEMP_BASE_1 (Results 1 – 6 of 6) sorted by relevance
70 kvaddr = TLBTEMP_BASE_1 + in kmap_invalidate_coherent()96 void *kvaddr = coherent_kvaddr(page, TLBTEMP_BASE_1, vaddr, &paddr); in clear_user_highpage()110 void *dst_vaddr = coherent_kvaddr(dst, TLBTEMP_BASE_1, vaddr, in copy_user_highpage()162 virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in flush_dcache_page()165 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK); in flush_dcache_page()204 unsigned long virt = TLBTEMP_BASE_1 + (address & DCACHE_ALIAS_MASK); in local_flush_cache_page()237 tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in update_mmu_cache()239 tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK); in update_mmu_cache()275 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); in copy_to_user_page()291 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); in copy_to_user_page()[all …]
86 BUILD_BUG_ON(PKMAP_BASE < TLBTEMP_BASE_1 + TLBTEMP_SIZE); in kmap_init()
86 | Cache aliasing | TLBTEMP_BASE_1 0xc8000000 DCACHE_WAY_SIZE129 | Cache aliasing | TLBTEMP_BASE_1 0xa8000000 DCACHE_WAY_SIZE173 | Cache aliasing | TLBTEMP_BASE_1 0x98000000 DCACHE_WAY_SIZE
66 TLBTEMP_BASE_1 + TLBTEMP_SIZE); in fix_to_virt()
72 #define TLBTEMP_BASE_1 (VMALLOC_START + 0x08000000) macro73 #define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)
1724 movi a3, TLBTEMP_BASE_1
