Searched refs:TI_CLK_MUX (Results 1 – 8 of 8) sorted by relevance
54 { 22, TI_CLK_MUX, dra7_mcasp1_aux_gfclk_mux_parents, NULL },55 { 24, TI_CLK_MUX, dra7_mcasp1_ahclkx_mux_parents, NULL },56 { 28, TI_CLK_MUX, dra7_mcasp1_ahclkx_mux_parents, NULL },77 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },82 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },87 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },92 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },103 { 24, TI_CLK_MUX, dra7_uart6_gfclk_mux_parents, NULL },166 { 24, TI_CLK_MUX, dra7_atl_dpll_clk_mux_parents, NULL },167 { 26, TI_CLK_MUX, dra7_atl_gfclk_mux_parents, NULL },[all …]
39 { 24, TI_CLK_MUX, dra7_ipu1_gfclk_mux_parents, NULL },75 { 22, TI_CLK_MUX, dra7_mcasp1_aux_gfclk_mux_parents, NULL },76 { 24, TI_CLK_MUX, dra7_mcasp1_ahclkx_mux_parents, NULL },77 { 28, TI_CLK_MUX, dra7_mcasp1_ahclkx_mux_parents, NULL },98 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },103 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },108 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },113 { 24, TI_CLK_MUX, dra7_timer5_gfclk_mux_parents, NULL },124 { 24, TI_CLK_MUX, dra7_uart6_gfclk_mux_parents, NULL },156 { 24, TI_CLK_MUX, dra7_cam_gfclk_mux_parents, NULL },[all …]
73 { 24, TI_CLK_MUX, omap4_func_dmic_abe_gfclk_parents, NULL },74 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },86 { 24, TI_CLK_MUX, omap4_func_mcasp_abe_gfclk_parents, NULL },87 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },99 { 24, TI_CLK_MUX, omap4_func_mcbsp1_gfclk_parents, NULL },100 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },112 { 24, TI_CLK_MUX, omap4_func_mcbsp2_gfclk_parents, NULL },113 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },125 { 24, TI_CLK_MUX, omap4_func_mcbsp3_gfclk_parents, NULL },126 { 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },[all …]
67 { 24, TI_CLK_MUX, omap5_dmic_gfclk_parents, NULL },68 { 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },80 { 24, TI_CLK_MUX, omap5_mcbsp1_gfclk_parents, NULL },81 { 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },93 { 24, TI_CLK_MUX, omap5_mcbsp2_gfclk_parents, NULL },94 { 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },106 { 24, TI_CLK_MUX, omap5_mcbsp3_gfclk_parents, NULL },107 { 26, TI_CLK_MUX, omap5_dmic_sync_mux_ck_parents, NULL },118 { 24, TI_CLK_MUX, omap5_timer5_gfclk_mux_parents, NULL },123 { 24, TI_CLK_MUX, omap5_timer5_gfclk_mux_parents, NULL },[all …]
149 { 20, TI_CLK_MUX, am3_trace_pmd_clk_mux_ck_parents, NULL },150 { 22, TI_CLK_MUX, am3_trace_pmd_clk_mux_ck_parents, NULL },
191 { 20, TI_CLK_MUX, am3_trace_pmd_clk_mux_ck_parents, NULL },192 { 22, TI_CLK_MUX, am3_trace_pmd_clk_mux_ck_parents, NULL },
49 TI_CLK_MUX, enumerator
452 case TI_CLK_MUX: in _ti_clkctrl_setup_subclks()
