Searched refs:TCR_EL1 (Results 1 – 9 of 9) sorted by relevance
| /Linux-v5.10/arch/arm64/kvm/hyp/include/hyp/ |
| D | sysreg-sr.h | 36 ctxt_sys_reg(ctxt, TCR_EL1) = read_sysreg_el1(SYS_TCR); in __sysreg_save_el1_state()
82 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
89 write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) | in __sysreg_restore_el1_state()
125 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
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| /Linux-v5.10/tools/testing/selftests/kvm/include/aarch64/ |
| D | processor.h | 17 #define TCR_EL1 3, 0, 2, 0, 2 macro
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| /Linux-v5.10/tools/testing/selftests/kvm/lib/aarch64/ |
| D | processor.c | 260 get_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), &tcr_el1); in aarch64_vcpu_setup()
299 set_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), tcr_el1); in aarch64_vcpu_setup()
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| /Linux-v5.10/arch/arm64/include/asm/ |
| D | kvm_host.h | 142 TCR_EL1, /* Translation Control Register */ enumerator
216 #define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */
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| /Linux-v5.10/arch/arm64/kvm/hyp/nvhe/ |
| D | switch.c | 63 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __activate_traps()
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| /Linux-v5.10/Documentation/arm64/ |
| D | tagged-address-abi.rst | 16 On AArch64 the ``TCR_EL1.TBI0`` bit is set by default, allowing
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| /Linux-v5.10/arch/arm64/kvm/ |
| D | sys_regs.c | 84 case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
124 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1543 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
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| /Linux-v5.10/Documentation/admin-guide/kdump/ |
| D | vmcoreinfo.rst | 480 TCR_EL1.T1SZ
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| /Linux-v5.10/arch/arm64/ |
| D | Kconfig | 744 case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
746 case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
1367 table entries. When enabled in TCR_EL1 (HA and HD bits) on
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