Searched refs:SUN9I_CPUS_PLL4_DIV_SET (Results 1 – 1 of 1) sorted by relevance
42 #define SUN9I_CPUS_PLL4_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_PLL4_DIV_MASK) | \ macro169 reg = SUN9I_CPUS_PLL4_DIV_SET(reg, pre_div); in sun9i_a80_cpus_clk_set_rate()
