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Searched refs:SPRN_L2CSR0 (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.10/arch/powerpc/kernel/
Dcpu_setup_fsl_booke.S312 mfspr r3, SPRN_L2CSR0
316 mtspr SPRN_L2CSR0,r3
320 1: mfspr r3,SPRN_L2CSR0
/Linux-v5.10/arch/powerpc/include/asm/
Dreg_booke.h178 #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ macro