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Searched refs:SPRN_DCCR (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.10/arch/powerpc/mm/nohash/
D40x.c82 mtspr(SPRN_DCCR, 0xFFFF0000); /* 2GByte of data space at 0x0. */ in MMU_init_hw()
/Linux-v5.10/arch/powerpc/include/asm/
Dreg_booke.h180 #define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */ macro