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Searched refs:SOR_LANE_SEQ_CTL_SEQUENCE_UP (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/tegra/
Dsor.h159 #define SOR_LANE_SEQ_CTL_SEQUENCE_UP (0 << 20) macro
Dsor.c706 value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_UP | in tegra_sor_power_down_lanes()