Searched refs:SIO_PDR_MCLK_CFG__A (Results 1 – 4 of 4) sorted by relevance
442 #define SIO_PDR_MCLK_CFG__A 0x7F0028 macro
1112 status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); in mpegts_configure_pins()1222 status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg); in mpegts_configure_pins()
3149 …rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MCLK_CFG__A, MPEG_OUTPUT_CLK_DRIVE_STRENGTH << SIO_PDR… in ctrl_set_cfg_mpeg_output()3279 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MCLK_CFG__A, 0x0000, 0); in ctrl_set_cfg_mpeg_output()
11504 #define SIO_PDR_MCLK_CFG__A 0x7F0028 macro
