Searched refs:SDMA0_GFX_APE1_CNTL (Results 1 – 2 of 2) sorted by relevance
2001 #define SDMA0_GFX_APE1_CNTL 0xD2A0 macro
5523 WREG32(SDMA0_GFX_APE1_CNTL + SDMA0_REGISTER_OFFSET, 0); in cik_pcie_gart_enable()5525 WREG32(SDMA0_GFX_APE1_CNTL + SDMA1_REGISTER_OFFSET, 0); in cik_pcie_gart_enable()
