Searched refs:SCLK_UART5 (Results 1 – 3 of 3) sorted by relevance
30 #define SCLK_UART5 28 macro
722 GATE(SCLK_UART5, "clk_uart5", "clk_uart5_mux", CLK_SET_RATE_PARENT,
509 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;