Searched refs:SCDL (Results 1 – 2 of 2) sorted by relevance
30 SCDL, /* BRG Frequency Division Register */ enumerator
380 [SCDL] = { 0x30, 16 },407 [SCDL] = { 0x30, 16 },2432 if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) { in sci_set_termios()2448 if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) { in sci_set_termios()2486 serial_port_out(port, SCDL, dl); in sci_set_termios()
