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Searched refs:RLC_CNTL (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/radeon/
Dsi.c5209 orig = data = RREG32(RLC_CNTL); in si_halt_rlc()
5213 WREG32(RLC_CNTL, data); in si_halt_rlc()
5225 tmp = RREG32(RLC_CNTL); in si_update_rlc()
5227 WREG32(RLC_CNTL, rlc); in si_update_rlc()
5821 WREG32(RLC_CNTL, 0); in si_rlc_stop()
5830 WREG32(RLC_CNTL, RLC_ENABLE); in si_rlc_start()
Dr600.c1705 WREG32(RLC_CNTL, 0); in r600_gpu_soft_reset()
1837 WREG32(RLC_CNTL, 0); in r600_gpu_pci_config_reset()
3546 WREG32(RLC_CNTL, 0); in r600_rlc_stop()
3551 WREG32(RLC_CNTL, RLC_ENABLE); in r600_rlc_start()
Dsid.h1300 #define RLC_CNTL 0xC300 macro
Dcik.c5821 tmp = RREG32(RLC_CNTL); in cik_update_rlc()
5823 WREG32(RLC_CNTL, rlc); in cik_update_rlc()
5830 orig = data = RREG32(RLC_CNTL); in cik_halt_rlc()
5836 WREG32(RLC_CNTL, data); in cik_halt_rlc()
5888 WREG32(RLC_CNTL, 0); in cik_rlc_stop()
5904 WREG32(RLC_CNTL, RLC_ENABLE); in cik_rlc_start()
Dcikd.h1393 #define RLC_CNTL 0xC300 macro
Devergreend.h384 #define RLC_CNTL 0x3f00 macro
Dr600d.h685 #define RLC_CNTL 0x3f00 macro
Devergreen.c4378 WREG32(RLC_CNTL, mask); in evergreen_rlc_start()
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dsid.h1328 #define RLC_CNTL 0x30C0 macro
Dgfx_v10_0.c4873 tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v10_0_rlc_stop()
4914 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v10_0_rlc_start()
7283 return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false; in gfx_v10_0_is_rlc_enabled()
Dgfx_v8_0.c4085 WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v8_0_rlc_stop()
4102 WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v8_0_rlc_start()
Dgfx_v9_0.c2997 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v9_0_rlc_stop()
3016 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v9_0_rlc_start()