Searched refs:REG_DSI_10nm_PHY_PLL_DSM_DIVIDER (Results 1 – 2 of 2) sorted by relevance
276 pll_write(base + REG_DSI_10nm_PHY_PLL_DSM_DIVIDER, 0x00); in dsi_pll_config_hzindep_reg()
1821 #define REG_DSI_10nm_PHY_PLL_DSM_DIVIDER 0x0000001c macro
