Searched refs:REG_A6XX_PDC_GPU_TCS3_CMD0_DATA (Results 1 – 2 of 2) sorted by relevance
563 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA, 2); in a6xx_gmu_rpmh_init()568 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA + 4, 0x2); in a6xx_gmu_rpmh_init()570 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA + 4, 0x3); in a6xx_gmu_rpmh_init()573 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA + 8, 0x3); in a6xx_gmu_rpmh_init()
7512 #define REG_A6XX_PDC_GPU_TCS3_CMD0_DATA 0x000015db macro
