Searched refs:REG_A5XX_CP_IB1_BASE (Results 1 – 2 of 2) sorted by relevance
1067 gpu_read64(gpu, REG_A5XX_CP_IB1_BASE, REG_A5XX_CP_IB1_BASE_HI), in a5xx_fault_detect_irq()
1021 #define REG_A5XX_CP_IB1_BASE 0x00000b1f macro
