Home
last modified time | relevance | path

Searched refs:REGS (Results 1 – 19 of 19) sorted by relevance

/Linux-v5.10/arch/hexagon/include/asm/
Delf.h91 #define CS_COPYREGS(DEST,REGS) \ argument
93 DEST.cs0 = REGS->cs0;\
94 DEST.cs1 = REGS->cs1;\
97 #define CS_COPYREGS(DEST,REGS) argument
100 #define ELF_CORE_COPY_REGS(DEST, REGS) \ argument
102 DEST.r0 = REGS->r00; \
103 DEST.r1 = REGS->r01; \
104 DEST.r2 = REGS->r02; \
105 DEST.r3 = REGS->r03; \
106 DEST.r4 = REGS->r04; \
[all …]
/Linux-v5.10/arch/arm/probes/
Ddecode-arm.c156 REGS(0, NOPC, 0, 0, 0)),
163 REGS(0, 0, 0, 0, NOPC)),
167 REGS(0, NOPC, 0, 0, NOPC)),
174 REGS(NOPC, NOPC, 0, 0, NOPC)),
190 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
196 REGS(NOPC, 0, NOPC, 0, NOPC)),
202 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
213 REGS(NOPC, 0, NOPC, 0, NOPC)),
220 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
233 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
[all …]
Ddecode-thumb.c54 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)),
59 REGS(NOSP, 0, 0, 0, NOSPPC)),
79 REGS(NOSPPC, 0, 0, 0, NOSPPC)),
85 REGS(NOPC, 0, 0, 0, NOSPPC)),
90 REGS(0, 0, NOSPPC, 0, NOSPPC)),
105 REGS(SP, 0, SP, 0, NOSPPC)),
114 REGS(SP, 0, NOPC, 0, NOSPPC)),
128 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
139 REGS(NOSPPC, 0, 0, 0, 0)),
145 REGS(NOPC, 0, 0, 0, 0)),
[all …]
Ddecode.h287 #define REGS(r16, r12, r8, r4, r0) \ macro
/Linux-v5.10/drivers/gpu/drm/msm/adreno/
Da6xx_gpu_state.h279 #define REGS(_array, _sel_reg, _sel_val) \ macro
284 REGS(a6xx_registers, 0, 0),
285 REGS(a6xx_rb_rac_registers, REG_A6XX_RB_RB_SUB_BLOCK_SEL_CNTL_CD, 0),
286 REGS(a6xx_rb_rbp_registers, REG_A6XX_RB_RB_SUB_BLOCK_SEL_CNTL_CD, 9),
315 REGS(a6xx_ahb_registers, 0, 0),
319 REGS(a6xx_vbif_registers, 0, 0);
322 REGS(a6xx_gbif_registers, 0, 0);
364 REGS(a6xx_gmu_cx_registers, 0, 0),
365 REGS(a6xx_gmu_cx_rscc_registers, 0, 0),
366 REGS(a6xx_gmu_gx_registers, 0, 0),
/Linux-v5.10/drivers/video/fbdev/nvidia/
Dnv_setup.c298 par->PRAMIN = par->REGS + (0x00710000 / 4); in NVCommonSetup()
299 par->PCRTC0 = par->REGS + (0x00600000 / 4); in NVCommonSetup()
300 par->PRAMDAC0 = par->REGS + (0x00680000 / 4); in NVCommonSetup()
301 par->PFB = par->REGS + (0x00100000 / 4); in NVCommonSetup()
302 par->PFIFO = par->REGS + (0x00002000 / 4); in NVCommonSetup()
303 par->PGRAPH = par->REGS + (0x00400000 / 4); in NVCommonSetup()
304 par->PEXTDEV = par->REGS + (0x00101000 / 4); in NVCommonSetup()
305 par->PTIMER = par->REGS + (0x00009000 / 4); in NVCommonSetup()
306 par->PMC = par->REGS + (0x00000000 / 4); in NVCommonSetup()
307 par->FIFO = par->REGS + (0x00800000 / 4); in NVCommonSetup()
[all …]
Dnv_type.h155 volatile u32 __iomem *REGS; member
Dnvidia.c1209 id = NV_RD32(par->REGS, 0x1800); in nvidia_get_chipset()
1325 par->REGS = ioremap(nvidiafb_fix.mmio_start, nvidiafb_fix.mmio_len); in nvidiafb_probe()
1327 if (!par->REGS) { in nvidiafb_probe()
1414 iounmap(par->REGS); in nvidiafb_probe()
1439 iounmap(par->REGS); in nvidiafb_remove()
Dnv_hw.c1225 j = NV_RD32(par->REGS, 0x1540) & 0xff; in NVLoadStateExt()
/Linux-v5.10/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_reg.h43 #define REG(reg) (REGS)->offset.reg
45 #define FD(reg_field) (REGS)->shift.reg_field, (REGS)->mask.reg_field
Ddmub_dcn21.c36 #define REGS dmub->regs macro
Ddmub_dcn30.c36 #define REGS dmub->regs macro
Ddmub_dcn20.c37 #define REGS dmub->regs macro
/Linux-v5.10/arch/alpha/include/asm/
Delf.h114 #define ELF_CORE_COPY_REGS(DEST, REGS) \ argument
115 dump_elf_thread(DEST, REGS, current_thread_info());
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Duvd_v4_2.c605 WREG32_FIELD(UVD_CGC_GATE, REGS, 0); in uvd_v4_2_set_dcm()
Duvd_v3_1.c207 WREG32_FIELD(UVD_CGC_GATE, REGS, 0); in uvd_v3_1_set_dcm()
/Linux-v5.10/drivers/memory/tegra/
Dtegra210-emc-cc-r21021.c33 #define REGS (1 << 30) macro
/Linux-v5.10/sound/pci/ali5451/
Dali5451.c160 struct REGS { struct
/Linux-v5.10/Documentation/virt/kvm/
Dapi.rst5327 certain guest registers without having to call SET/GET_*REGS. Thus we can
5559 without having to call SET/GET_*REGS". This reduces overhead by eliminating