Searched refs:Post (Results 1 – 25 of 35) sorted by relevance
12
19 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |33 Video Post Processing37 :doc: Video Post Processing
51 Post image processor (improc)53 Post image processor adjusts frame data like gamma and color space to fit the
28 movq %rsp,8(%rdi) # Post-return %rsp!
31 movl %esp,4(%edx) # Post-return %esp!
29 Post on netdev if something is unclear.
47 0x6001c200 0x100 /* Post-processing Engine */
42 * Post-patch51 * Post-unpatch
65 # Post Resume Delay
66 # Post Resume Delay
93 # Post Resume Delay
125 - Post the packet to IOP by writing it to inbound queue. For requests171 - Post the inbound list writer pointer to IOP.
26 [2-2-2] Post transportt->eh_strategy_handler() SCSI midlayer conditions473 2.2.2 Post transportt->eh_strategy_handler() SCSI midlayer conditions
43 - apm,tx-post-cursor : Post-cursor emphasis taps control. Two set of
59 - phy-reset-post-delay : Post reset delay in milliseconds. If present then
79 Post-VLAN parsing::
4884 uint32_t Post; in ips_init_morpheus() local4911 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0); in ips_init_morpheus()4913 if (Post == 0x4F00) { /* If Flashing the Battery PIC */ in ips_init_morpheus()4922 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0); in ips_init_morpheus()4923 if (Post != 0x4F00) in ips_init_morpheus()4941 if (Post < (IPS_GOOD_POST_STATUS << 8)) { in ips_init_morpheus()4943 "reset controller fails (post status %x).\n", Post); in ips_init_morpheus()4981 if (Post == 0xEF10) { in ips_init_morpheus()
106 Post
