Searched refs:PT_VR0 (Results 1 – 2 of 2) sorted by relevance
132 #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ macro133 #define PT_VSCR (PT_VR0 + 32*2 + 1)134 #define PT_VRSAVE (PT_VR0 + 33*2)
320 #define PT_VSCR_32 (PT_VR0 + 32*4 + 3)321 #define PT_VRSAVE_32 (PT_VR0 + 33*4)
