Searched refs:PLLX_BASE (Results 1 – 6 of 6) sorted by relevance
56 #define PLLX_BASE 0xe0 macro387 .base_reg = PLLX_BASE,949 readl(clk_base + PLLX_BASE); in tegra20_cpu_clock_suspend()974 base = readl_relaxed(clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()982 clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
17 #define PLLX_BASE 0xe0 macro
61 #define PLLX_BASE 0xe0 macro501 .base_reg = PLLX_BASE,
61 #define PLLX_BASE 0xe0 macro494 .base_reg = PLLX_BASE,
54 #define PLLX_BASE 0xe0 macro188 .base_reg = PLLX_BASE,
78 #define PLLX_BASE 0xe0 macro1609 .base_reg = PLLX_BASE,
