Searched refs:PCIE_ISR0_MASK_REG (Results 1 – 1 of 1) sorted by relevance
103 #define PCIE_ISR0_MASK_REG (CONTROL_BASE_ADDR + 0x44) macro428 advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); in advk_pcie_setup_hw()535 u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); in advk_pci_bridge_emul_pcie_conf_read()588 u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) & in advk_pci_bridge_emul_pcie_conf_write()592 advk_writel(pcie, val, PCIE_ISR0_MASK_REG); in advk_pci_bridge_emul_pcie_conf_write()1013 isr0_mask = advk_readl(pcie, PCIE_ISR0_MASK_REG); in advk_pcie_handle_int()
