Home
last modified time | relevance | path

Searched refs:PACKET3_CONTEXT_CONTROL (Results 1 – 20 of 20) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dsi_enums.h192 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsoc15d.h99 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dnvd.h76 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dvid.h131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dcikd.h249 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dgfx_v7_0.c2336 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2549 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
3991 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_get_csb_buffer()
Dsid.h1687 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dgfx_v6_0.c2887 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_0_get_csb_buffer()
2976 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_ring_emit_cntxcntl()
Dgfx_v8_0.c1258 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_get_csb_buffer()
4196 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
6351 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_ring_emit_cntxcntl()
Dgfx_v9_0.c1710 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
3202 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
5483 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
Dgfx_v10_0.c3989 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_get_csb_buffer()
5779 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_cp_gfx_start()
7972 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_ring_emit_cntxcntl()
/Linux-v5.10/drivers/gpu/drm/radeon/
Dnid.h1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsid.h1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dcikd.h1717 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Devergreen_cs.c1827 case PACKET3_CONTEXT_CONTROL: in evergreen_packet3_check()
3377 case PACKET3_CONTEXT_CONTROL: in evergreen_vm_packet3_check()
Devergreend.h1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsi.c4557 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_gfx_check()
4670 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_compute_check()
5729 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in si_get_csb_buffer()
Dr600d.h1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dr600_cs.c1686 case PACKET3_CONTEXT_CONTROL: in r600_packet3_check()
Dcik.c4009 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_cp_gfx_start()
6724 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_get_csb_buffer()