1 // SPDX-License-Identifier: GPL-2.0-or-later
2 #include <net/dsa.h>
3
4 #include "chip.h"
5 #include "devlink.h"
6 #include "global1.h"
7 #include "global2.h"
8 #include "port.h"
9
mv88e6xxx_atu_get_hash(struct mv88e6xxx_chip * chip,u8 * hash)10 static int mv88e6xxx_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash)
11 {
12 if (chip->info->ops->atu_get_hash)
13 return chip->info->ops->atu_get_hash(chip, hash);
14
15 return -EOPNOTSUPP;
16 }
17
mv88e6xxx_atu_set_hash(struct mv88e6xxx_chip * chip,u8 hash)18 static int mv88e6xxx_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash)
19 {
20 if (chip->info->ops->atu_set_hash)
21 return chip->info->ops->atu_set_hash(chip, hash);
22
23 return -EOPNOTSUPP;
24 }
25
26 enum mv88e6xxx_devlink_param_id {
27 MV88E6XXX_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
28 MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH,
29 };
30
mv88e6xxx_devlink_param_get(struct dsa_switch * ds,u32 id,struct devlink_param_gset_ctx * ctx)31 int mv88e6xxx_devlink_param_get(struct dsa_switch *ds, u32 id,
32 struct devlink_param_gset_ctx *ctx)
33 {
34 struct mv88e6xxx_chip *chip = ds->priv;
35 int err;
36
37 mv88e6xxx_reg_lock(chip);
38
39 switch (id) {
40 case MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH:
41 err = mv88e6xxx_atu_get_hash(chip, &ctx->val.vu8);
42 break;
43 default:
44 err = -EOPNOTSUPP;
45 break;
46 }
47
48 mv88e6xxx_reg_unlock(chip);
49
50 return err;
51 }
52
mv88e6xxx_devlink_param_set(struct dsa_switch * ds,u32 id,struct devlink_param_gset_ctx * ctx)53 int mv88e6xxx_devlink_param_set(struct dsa_switch *ds, u32 id,
54 struct devlink_param_gset_ctx *ctx)
55 {
56 struct mv88e6xxx_chip *chip = ds->priv;
57 int err;
58
59 mv88e6xxx_reg_lock(chip);
60
61 switch (id) {
62 case MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH:
63 err = mv88e6xxx_atu_set_hash(chip, ctx->val.vu8);
64 break;
65 default:
66 err = -EOPNOTSUPP;
67 break;
68 }
69
70 mv88e6xxx_reg_unlock(chip);
71
72 return err;
73 }
74
75 static const struct devlink_param mv88e6xxx_devlink_params[] = {
76 DSA_DEVLINK_PARAM_DRIVER(MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH,
77 "ATU_hash", DEVLINK_PARAM_TYPE_U8,
78 BIT(DEVLINK_PARAM_CMODE_RUNTIME)),
79 };
80
mv88e6xxx_setup_devlink_params(struct dsa_switch * ds)81 int mv88e6xxx_setup_devlink_params(struct dsa_switch *ds)
82 {
83 return dsa_devlink_params_register(ds, mv88e6xxx_devlink_params,
84 ARRAY_SIZE(mv88e6xxx_devlink_params));
85 }
86
mv88e6xxx_teardown_devlink_params(struct dsa_switch * ds)87 void mv88e6xxx_teardown_devlink_params(struct dsa_switch *ds)
88 {
89 dsa_devlink_params_unregister(ds, mv88e6xxx_devlink_params,
90 ARRAY_SIZE(mv88e6xxx_devlink_params));
91 }
92
93 enum mv88e6xxx_devlink_resource_id {
94 MV88E6XXX_RESOURCE_ID_ATU,
95 MV88E6XXX_RESOURCE_ID_ATU_BIN_0,
96 MV88E6XXX_RESOURCE_ID_ATU_BIN_1,
97 MV88E6XXX_RESOURCE_ID_ATU_BIN_2,
98 MV88E6XXX_RESOURCE_ID_ATU_BIN_3,
99 };
100
mv88e6xxx_devlink_atu_bin_get(struct mv88e6xxx_chip * chip,u16 bin)101 static u64 mv88e6xxx_devlink_atu_bin_get(struct mv88e6xxx_chip *chip,
102 u16 bin)
103 {
104 u16 occupancy = 0;
105 int err;
106
107 mv88e6xxx_reg_lock(chip);
108
109 err = mv88e6xxx_g2_atu_stats_set(chip, MV88E6XXX_G2_ATU_STATS_MODE_ALL,
110 bin);
111 if (err) {
112 dev_err(chip->dev, "failed to set ATU stats kind/bin\n");
113 goto unlock;
114 }
115
116 err = mv88e6xxx_g1_atu_get_next(chip, 0);
117 if (err) {
118 dev_err(chip->dev, "failed to perform ATU get next\n");
119 goto unlock;
120 }
121
122 err = mv88e6xxx_g2_atu_stats_get(chip, &occupancy);
123 if (err) {
124 dev_err(chip->dev, "failed to get ATU stats\n");
125 goto unlock;
126 }
127
128 occupancy &= MV88E6XXX_G2_ATU_STATS_MASK;
129
130 unlock:
131 mv88e6xxx_reg_unlock(chip);
132
133 return occupancy;
134 }
135
mv88e6xxx_devlink_atu_bin_0_get(void * priv)136 static u64 mv88e6xxx_devlink_atu_bin_0_get(void *priv)
137 {
138 struct mv88e6xxx_chip *chip = priv;
139
140 return mv88e6xxx_devlink_atu_bin_get(chip,
141 MV88E6XXX_G2_ATU_STATS_BIN_0);
142 }
143
mv88e6xxx_devlink_atu_bin_1_get(void * priv)144 static u64 mv88e6xxx_devlink_atu_bin_1_get(void *priv)
145 {
146 struct mv88e6xxx_chip *chip = priv;
147
148 return mv88e6xxx_devlink_atu_bin_get(chip,
149 MV88E6XXX_G2_ATU_STATS_BIN_1);
150 }
151
mv88e6xxx_devlink_atu_bin_2_get(void * priv)152 static u64 mv88e6xxx_devlink_atu_bin_2_get(void *priv)
153 {
154 struct mv88e6xxx_chip *chip = priv;
155
156 return mv88e6xxx_devlink_atu_bin_get(chip,
157 MV88E6XXX_G2_ATU_STATS_BIN_2);
158 }
159
mv88e6xxx_devlink_atu_bin_3_get(void * priv)160 static u64 mv88e6xxx_devlink_atu_bin_3_get(void *priv)
161 {
162 struct mv88e6xxx_chip *chip = priv;
163
164 return mv88e6xxx_devlink_atu_bin_get(chip,
165 MV88E6XXX_G2_ATU_STATS_BIN_3);
166 }
167
mv88e6xxx_devlink_atu_get(void * priv)168 static u64 mv88e6xxx_devlink_atu_get(void *priv)
169 {
170 return mv88e6xxx_devlink_atu_bin_0_get(priv) +
171 mv88e6xxx_devlink_atu_bin_1_get(priv) +
172 mv88e6xxx_devlink_atu_bin_2_get(priv) +
173 mv88e6xxx_devlink_atu_bin_3_get(priv);
174 }
175
mv88e6xxx_setup_devlink_resources(struct dsa_switch * ds)176 int mv88e6xxx_setup_devlink_resources(struct dsa_switch *ds)
177 {
178 struct devlink_resource_size_params size_params;
179 struct mv88e6xxx_chip *chip = ds->priv;
180 int err;
181
182 devlink_resource_size_params_init(&size_params,
183 mv88e6xxx_num_macs(chip),
184 mv88e6xxx_num_macs(chip),
185 1, DEVLINK_RESOURCE_UNIT_ENTRY);
186
187 err = dsa_devlink_resource_register(ds, "ATU",
188 mv88e6xxx_num_macs(chip),
189 MV88E6XXX_RESOURCE_ID_ATU,
190 DEVLINK_RESOURCE_ID_PARENT_TOP,
191 &size_params);
192 if (err)
193 goto out;
194
195 devlink_resource_size_params_init(&size_params,
196 mv88e6xxx_num_macs(chip) / 4,
197 mv88e6xxx_num_macs(chip) / 4,
198 1, DEVLINK_RESOURCE_UNIT_ENTRY);
199
200 err = dsa_devlink_resource_register(ds, "ATU_bin_0",
201 mv88e6xxx_num_macs(chip) / 4,
202 MV88E6XXX_RESOURCE_ID_ATU_BIN_0,
203 MV88E6XXX_RESOURCE_ID_ATU,
204 &size_params);
205 if (err)
206 goto out;
207
208 err = dsa_devlink_resource_register(ds, "ATU_bin_1",
209 mv88e6xxx_num_macs(chip) / 4,
210 MV88E6XXX_RESOURCE_ID_ATU_BIN_1,
211 MV88E6XXX_RESOURCE_ID_ATU,
212 &size_params);
213 if (err)
214 goto out;
215
216 err = dsa_devlink_resource_register(ds, "ATU_bin_2",
217 mv88e6xxx_num_macs(chip) / 4,
218 MV88E6XXX_RESOURCE_ID_ATU_BIN_2,
219 MV88E6XXX_RESOURCE_ID_ATU,
220 &size_params);
221 if (err)
222 goto out;
223
224 err = dsa_devlink_resource_register(ds, "ATU_bin_3",
225 mv88e6xxx_num_macs(chip) / 4,
226 MV88E6XXX_RESOURCE_ID_ATU_BIN_3,
227 MV88E6XXX_RESOURCE_ID_ATU,
228 &size_params);
229 if (err)
230 goto out;
231
232 dsa_devlink_resource_occ_get_register(ds,
233 MV88E6XXX_RESOURCE_ID_ATU,
234 mv88e6xxx_devlink_atu_get,
235 chip);
236
237 dsa_devlink_resource_occ_get_register(ds,
238 MV88E6XXX_RESOURCE_ID_ATU_BIN_0,
239 mv88e6xxx_devlink_atu_bin_0_get,
240 chip);
241
242 dsa_devlink_resource_occ_get_register(ds,
243 MV88E6XXX_RESOURCE_ID_ATU_BIN_1,
244 mv88e6xxx_devlink_atu_bin_1_get,
245 chip);
246
247 dsa_devlink_resource_occ_get_register(ds,
248 MV88E6XXX_RESOURCE_ID_ATU_BIN_2,
249 mv88e6xxx_devlink_atu_bin_2_get,
250 chip);
251
252 dsa_devlink_resource_occ_get_register(ds,
253 MV88E6XXX_RESOURCE_ID_ATU_BIN_3,
254 mv88e6xxx_devlink_atu_bin_3_get,
255 chip);
256
257 return 0;
258
259 out:
260 dsa_devlink_resources_unregister(ds);
261 return err;
262 }
263
mv88e6xxx_region_global_snapshot(struct devlink * dl,const struct devlink_region_ops * ops,struct netlink_ext_ack * extack,u8 ** data)264 static int mv88e6xxx_region_global_snapshot(struct devlink *dl,
265 const struct devlink_region_ops *ops,
266 struct netlink_ext_ack *extack,
267 u8 **data)
268 {
269 struct mv88e6xxx_region_priv *region_priv = ops->priv;
270 struct dsa_switch *ds = dsa_devlink_to_ds(dl);
271 struct mv88e6xxx_chip *chip = ds->priv;
272 u16 *registers;
273 int i, err;
274
275 registers = kmalloc_array(32, sizeof(u16), GFP_KERNEL);
276 if (!registers)
277 return -ENOMEM;
278
279 mv88e6xxx_reg_lock(chip);
280 for (i = 0; i < 32; i++) {
281 switch (region_priv->id) {
282 case MV88E6XXX_REGION_GLOBAL1:
283 err = mv88e6xxx_g1_read(chip, i, ®isters[i]);
284 break;
285 case MV88E6XXX_REGION_GLOBAL2:
286 err = mv88e6xxx_g2_read(chip, i, ®isters[i]);
287 break;
288 default:
289 err = -EOPNOTSUPP;
290 }
291
292 if (err) {
293 kfree(registers);
294 goto out;
295 }
296 }
297 *data = (u8 *)registers;
298 out:
299 mv88e6xxx_reg_unlock(chip);
300
301 return err;
302 }
303
304 /* The ATU entry varies between mv88e6xxx chipset generations. Define
305 * a generic format which covers all the current and hopefully future
306 * mv88e6xxx generations
307 */
308
309 struct mv88e6xxx_devlink_atu_entry {
310 /* The FID is scattered over multiple registers. */
311 u16 fid;
312 u16 atu_op;
313 u16 atu_data;
314 u16 atu_01;
315 u16 atu_23;
316 u16 atu_45;
317 };
318
mv88e6xxx_region_atu_snapshot_fid(struct mv88e6xxx_chip * chip,int fid,struct mv88e6xxx_devlink_atu_entry * table,int * count)319 static int mv88e6xxx_region_atu_snapshot_fid(struct mv88e6xxx_chip *chip,
320 int fid,
321 struct mv88e6xxx_devlink_atu_entry *table,
322 int *count)
323 {
324 u16 atu_op, atu_data, atu_01, atu_23, atu_45;
325 struct mv88e6xxx_atu_entry addr;
326 int err;
327
328 addr.state = 0;
329 eth_broadcast_addr(addr.mac);
330
331 do {
332 err = mv88e6xxx_g1_atu_getnext(chip, fid, &addr);
333 if (err)
334 return err;
335
336 if (!addr.state)
337 break;
338
339 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &atu_op);
340 if (err)
341 return err;
342
343 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_DATA, &atu_data);
344 if (err)
345 return err;
346
347 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC01, &atu_01);
348 if (err)
349 return err;
350
351 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC23, &atu_23);
352 if (err)
353 return err;
354
355 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC45, &atu_45);
356 if (err)
357 return err;
358
359 table[*count].fid = fid;
360 table[*count].atu_op = atu_op;
361 table[*count].atu_data = atu_data;
362 table[*count].atu_01 = atu_01;
363 table[*count].atu_23 = atu_23;
364 table[*count].atu_45 = atu_45;
365 (*count)++;
366 } while (!is_broadcast_ether_addr(addr.mac));
367
368 return 0;
369 }
370
mv88e6xxx_region_atu_snapshot(struct devlink * dl,const struct devlink_region_ops * ops,struct netlink_ext_ack * extack,u8 ** data)371 static int mv88e6xxx_region_atu_snapshot(struct devlink *dl,
372 const struct devlink_region_ops *ops,
373 struct netlink_ext_ack *extack,
374 u8 **data)
375 {
376 struct dsa_switch *ds = dsa_devlink_to_ds(dl);
377 DECLARE_BITMAP(fid_bitmap, MV88E6XXX_N_FID);
378 struct mv88e6xxx_devlink_atu_entry *table;
379 struct mv88e6xxx_chip *chip = ds->priv;
380 int fid = -1, count, err;
381
382 table = kmalloc_array(mv88e6xxx_num_databases(chip),
383 sizeof(struct mv88e6xxx_devlink_atu_entry),
384 GFP_KERNEL);
385 if (!table)
386 return -ENOMEM;
387
388 memset(table, 0, mv88e6xxx_num_databases(chip) *
389 sizeof(struct mv88e6xxx_devlink_atu_entry));
390
391 count = 0;
392
393 mv88e6xxx_reg_lock(chip);
394
395 err = mv88e6xxx_fid_map(chip, fid_bitmap);
396 if (err) {
397 kfree(table);
398 goto out;
399 }
400
401 while (1) {
402 fid = find_next_bit(fid_bitmap, MV88E6XXX_N_FID, fid + 1);
403 if (fid == MV88E6XXX_N_FID)
404 break;
405
406 err = mv88e6xxx_region_atu_snapshot_fid(chip, fid, table,
407 &count);
408 if (err) {
409 kfree(table);
410 goto out;
411 }
412 }
413 *data = (u8 *)table;
414 out:
415 mv88e6xxx_reg_unlock(chip);
416
417 return err;
418 }
419
mv88e6xxx_region_port_snapshot(struct devlink_port * devlink_port,const struct devlink_port_region_ops * ops,struct netlink_ext_ack * extack,u8 ** data)420 static int mv88e6xxx_region_port_snapshot(struct devlink_port *devlink_port,
421 const struct devlink_port_region_ops *ops,
422 struct netlink_ext_ack *extack,
423 u8 **data)
424 {
425 struct dsa_switch *ds = dsa_devlink_port_to_ds(devlink_port);
426 int port = dsa_devlink_port_to_port(devlink_port);
427 struct mv88e6xxx_chip *chip = ds->priv;
428 u16 *registers;
429 int i, err;
430
431 registers = kmalloc_array(32, sizeof(u16), GFP_KERNEL);
432 if (!registers)
433 return -ENOMEM;
434
435 mv88e6xxx_reg_lock(chip);
436 for (i = 0; i < 32; i++) {
437 err = mv88e6xxx_port_read(chip, port, i, ®isters[i]);
438 if (err) {
439 kfree(registers);
440 goto out;
441 }
442 }
443 *data = (u8 *)registers;
444 out:
445 mv88e6xxx_reg_unlock(chip);
446
447 return err;
448 }
449
450 static struct mv88e6xxx_region_priv mv88e6xxx_region_global1_priv = {
451 .id = MV88E6XXX_REGION_GLOBAL1,
452 };
453
454 static struct devlink_region_ops mv88e6xxx_region_global1_ops = {
455 .name = "global1",
456 .snapshot = mv88e6xxx_region_global_snapshot,
457 .destructor = kfree,
458 .priv = &mv88e6xxx_region_global1_priv,
459 };
460
461 static struct mv88e6xxx_region_priv mv88e6xxx_region_global2_priv = {
462 .id = MV88E6XXX_REGION_GLOBAL2,
463 };
464
465 static struct devlink_region_ops mv88e6xxx_region_global2_ops = {
466 .name = "global2",
467 .snapshot = mv88e6xxx_region_global_snapshot,
468 .destructor = kfree,
469 .priv = &mv88e6xxx_region_global2_priv,
470 };
471
472 static struct devlink_region_ops mv88e6xxx_region_atu_ops = {
473 .name = "atu",
474 .snapshot = mv88e6xxx_region_atu_snapshot,
475 .destructor = kfree,
476 };
477
478 static const struct devlink_port_region_ops mv88e6xxx_region_port_ops = {
479 .name = "port",
480 .snapshot = mv88e6xxx_region_port_snapshot,
481 .destructor = kfree,
482 };
483
484 struct mv88e6xxx_region {
485 struct devlink_region_ops *ops;
486 u64 size;
487 };
488
489 static struct mv88e6xxx_region mv88e6xxx_regions[] = {
490 [MV88E6XXX_REGION_GLOBAL1] = {
491 .ops = &mv88e6xxx_region_global1_ops,
492 .size = 32 * sizeof(u16)
493 },
494 [MV88E6XXX_REGION_GLOBAL2] = {
495 .ops = &mv88e6xxx_region_global2_ops,
496 .size = 32 * sizeof(u16) },
497 [MV88E6XXX_REGION_ATU] = {
498 .ops = &mv88e6xxx_region_atu_ops
499 /* calculated at runtime */
500 },
501 };
502
503 static void
mv88e6xxx_teardown_devlink_regions_global(struct mv88e6xxx_chip * chip)504 mv88e6xxx_teardown_devlink_regions_global(struct mv88e6xxx_chip *chip)
505 {
506 int i;
507
508 for (i = 0; i < ARRAY_SIZE(mv88e6xxx_regions); i++)
509 dsa_devlink_region_destroy(chip->regions[i]);
510 }
511
512 static void
mv88e6xxx_teardown_devlink_regions_port(struct mv88e6xxx_chip * chip,int port)513 mv88e6xxx_teardown_devlink_regions_port(struct mv88e6xxx_chip *chip,
514 int port)
515 {
516 dsa_devlink_region_destroy(chip->ports[port].region);
517 }
518
mv88e6xxx_setup_devlink_regions_port(struct dsa_switch * ds,struct mv88e6xxx_chip * chip,int port)519 static int mv88e6xxx_setup_devlink_regions_port(struct dsa_switch *ds,
520 struct mv88e6xxx_chip *chip,
521 int port)
522 {
523 struct devlink_region *region;
524
525 region = dsa_devlink_port_region_create(ds,
526 port,
527 &mv88e6xxx_region_port_ops, 1,
528 32 * sizeof(u16));
529 if (IS_ERR(region))
530 return PTR_ERR(region);
531
532 chip->ports[port].region = region;
533
534 return 0;
535 }
536
537 static void
mv88e6xxx_teardown_devlink_regions_ports(struct mv88e6xxx_chip * chip)538 mv88e6xxx_teardown_devlink_regions_ports(struct mv88e6xxx_chip *chip)
539 {
540 int port;
541
542 for (port = 0; port < mv88e6xxx_num_ports(chip); port++)
543 mv88e6xxx_teardown_devlink_regions_port(chip, port);
544 }
545
mv88e6xxx_setup_devlink_regions_ports(struct dsa_switch * ds,struct mv88e6xxx_chip * chip)546 static int mv88e6xxx_setup_devlink_regions_ports(struct dsa_switch *ds,
547 struct mv88e6xxx_chip *chip)
548 {
549 int port;
550 int err;
551
552 for (port = 0; port < mv88e6xxx_num_ports(chip); port++) {
553 err = mv88e6xxx_setup_devlink_regions_port(ds, chip, port);
554 if (err)
555 goto out;
556 }
557
558 return 0;
559
560 out:
561 while (port-- > 0)
562 mv88e6xxx_teardown_devlink_regions_port(chip, port);
563
564 return err;
565 }
566
mv88e6xxx_setup_devlink_regions_global(struct dsa_switch * ds,struct mv88e6xxx_chip * chip)567 static int mv88e6xxx_setup_devlink_regions_global(struct dsa_switch *ds,
568 struct mv88e6xxx_chip *chip)
569 {
570 struct devlink_region_ops *ops;
571 struct devlink_region *region;
572 u64 size;
573 int i, j;
574
575 for (i = 0; i < ARRAY_SIZE(mv88e6xxx_regions); i++) {
576 ops = mv88e6xxx_regions[i].ops;
577 size = mv88e6xxx_regions[i].size;
578
579 if (i == MV88E6XXX_REGION_ATU)
580 size = mv88e6xxx_num_databases(chip) *
581 sizeof(struct mv88e6xxx_devlink_atu_entry);
582
583 region = dsa_devlink_region_create(ds, ops, 1, size);
584 if (IS_ERR(region))
585 goto out;
586 chip->regions[i] = region;
587 }
588 return 0;
589
590 out:
591 for (j = 0; j < i; j++)
592 dsa_devlink_region_destroy(chip->regions[j]);
593
594 return PTR_ERR(region);
595 }
596
mv88e6xxx_setup_devlink_regions(struct dsa_switch * ds)597 int mv88e6xxx_setup_devlink_regions(struct dsa_switch *ds)
598 {
599 struct mv88e6xxx_chip *chip = ds->priv;
600 int err;
601
602 err = mv88e6xxx_setup_devlink_regions_global(ds, chip);
603 if (err)
604 return err;
605
606 err = mv88e6xxx_setup_devlink_regions_ports(ds, chip);
607 if (err)
608 mv88e6xxx_teardown_devlink_regions_global(chip);
609
610 return err;
611 }
612
mv88e6xxx_teardown_devlink_regions(struct dsa_switch * ds)613 void mv88e6xxx_teardown_devlink_regions(struct dsa_switch *ds)
614 {
615 struct mv88e6xxx_chip *chip = ds->priv;
616
617 mv88e6xxx_teardown_devlink_regions_ports(chip);
618 mv88e6xxx_teardown_devlink_regions_global(chip);
619 }
620
mv88e6xxx_devlink_info_get(struct dsa_switch * ds,struct devlink_info_req * req,struct netlink_ext_ack * extack)621 int mv88e6xxx_devlink_info_get(struct dsa_switch *ds,
622 struct devlink_info_req *req,
623 struct netlink_ext_ack *extack)
624 {
625 struct mv88e6xxx_chip *chip = ds->priv;
626 int err;
627
628 err = devlink_info_driver_name_put(req, "mv88e6xxx");
629 if (err)
630 return err;
631
632 return devlink_info_version_fixed_put(req,
633 DEVLINK_INFO_VERSION_GENERIC_ASIC_ID,
634 chip->info->name);
635 }
636
