1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2020 MediaTek Inc. 4 */ 5 6 #ifndef __MFD_MT6358_REGISTERS_H__ 7 #define __MFD_MT6358_REGISTERS_H__ 8 9 /* PMIC Registers */ 10 #define MT6358_SWCID 0xa 11 #define MT6358_MISC_TOP_INT_CON0 0x188 12 #define MT6358_MISC_TOP_INT_STATUS0 0x194 13 #define MT6358_TOP_INT_STATUS0 0x19e 14 #define MT6358_SCK_TOP_INT_CON0 0x52e 15 #define MT6358_SCK_TOP_INT_STATUS0 0x53a 16 #define MT6358_EOSC_CALI_CON0 0x540 17 #define MT6358_EOSC_CALI_CON1 0x542 18 #define MT6358_RTC_MIX_CON0 0x544 19 #define MT6358_RTC_MIX_CON1 0x546 20 #define MT6358_RTC_MIX_CON2 0x548 21 #define MT6358_RTC_DSN_ID 0x580 22 #define MT6358_RTC_DSN_REV0 0x582 23 #define MT6358_RTC_DBI 0x584 24 #define MT6358_RTC_DXI 0x586 25 #define MT6358_RTC_BBPU 0x588 26 #define MT6358_RTC_IRQ_STA 0x58a 27 #define MT6358_RTC_IRQ_EN 0x58c 28 #define MT6358_RTC_CII_EN 0x58e 29 #define MT6358_RTC_AL_MASK 0x590 30 #define MT6358_RTC_TC_SEC 0x592 31 #define MT6358_RTC_TC_MIN 0x594 32 #define MT6358_RTC_TC_HOU 0x596 33 #define MT6358_RTC_TC_DOM 0x598 34 #define MT6358_RTC_TC_DOW 0x59a 35 #define MT6358_RTC_TC_MTH 0x59c 36 #define MT6358_RTC_TC_YEA 0x59e 37 #define MT6358_RTC_AL_SEC 0x5a0 38 #define MT6358_RTC_AL_MIN 0x5a2 39 #define MT6358_RTC_AL_HOU 0x5a4 40 #define MT6358_RTC_AL_DOM 0x5a6 41 #define MT6358_RTC_AL_DOW 0x5a8 42 #define MT6358_RTC_AL_MTH 0x5aa 43 #define MT6358_RTC_AL_YEA 0x5ac 44 #define MT6358_RTC_OSC32CON 0x5ae 45 #define MT6358_RTC_POWERKEY1 0x5b0 46 #define MT6358_RTC_POWERKEY2 0x5b2 47 #define MT6358_RTC_PDN1 0x5b4 48 #define MT6358_RTC_PDN2 0x5b6 49 #define MT6358_RTC_SPAR0 0x5b8 50 #define MT6358_RTC_SPAR1 0x5ba 51 #define MT6358_RTC_PROT 0x5bc 52 #define MT6358_RTC_DIFF 0x5be 53 #define MT6358_RTC_CALI 0x5c0 54 #define MT6358_RTC_WRTGR 0x5c2 55 #define MT6358_RTC_CON 0x5c4 56 #define MT6358_RTC_SEC_CTRL 0x5c6 57 #define MT6358_RTC_INT_CNT 0x5c8 58 #define MT6358_RTC_SEC_DAT0 0x5ca 59 #define MT6358_RTC_SEC_DAT1 0x5cc 60 #define MT6358_RTC_SEC_DAT2 0x5ce 61 #define MT6358_RTC_SEC_DSN_ID 0x600 62 #define MT6358_RTC_SEC_DSN_REV0 0x602 63 #define MT6358_RTC_SEC_DBI 0x604 64 #define MT6358_RTC_SEC_DXI 0x606 65 #define MT6358_RTC_TC_SEC_SEC 0x608 66 #define MT6358_RTC_TC_MIN_SEC 0x60a 67 #define MT6358_RTC_TC_HOU_SEC 0x60c 68 #define MT6358_RTC_TC_DOM_SEC 0x60e 69 #define MT6358_RTC_TC_DOW_SEC 0x610 70 #define MT6358_RTC_TC_MTH_SEC 0x612 71 #define MT6358_RTC_TC_YEA_SEC 0x614 72 #define MT6358_RTC_SEC_CK_PDN 0x616 73 #define MT6358_RTC_SEC_WRTGR 0x618 74 #define MT6358_PSC_TOP_INT_CON0 0x910 75 #define MT6358_PSC_TOP_INT_STATUS0 0x91c 76 #define MT6358_BM_TOP_INT_CON0 0xc32 77 #define MT6358_BM_TOP_INT_CON1 0xc38 78 #define MT6358_BM_TOP_INT_STATUS0 0xc4a 79 #define MT6358_BM_TOP_INT_STATUS1 0xc4c 80 #define MT6358_HK_TOP_INT_CON0 0xf92 81 #define MT6358_HK_TOP_INT_STATUS0 0xf9e 82 #define MT6358_BUCK_TOP_INT_CON0 0x1318 83 #define MT6358_BUCK_TOP_INT_STATUS0 0x1324 84 #define MT6358_BUCK_VPROC11_CON0 0x1388 85 #define MT6358_BUCK_VPROC11_DBG0 0x139e 86 #define MT6358_BUCK_VPROC11_DBG1 0x13a0 87 #define MT6358_BUCK_VPROC11_ELR0 0x13a6 88 #define MT6358_BUCK_VPROC12_CON0 0x1408 89 #define MT6358_BUCK_VPROC12_DBG0 0x141e 90 #define MT6358_BUCK_VPROC12_DBG1 0x1420 91 #define MT6358_BUCK_VPROC12_ELR0 0x1426 92 #define MT6358_BUCK_VCORE_CON0 0x1488 93 #define MT6358_BUCK_VCORE_DBG0 0x149e 94 #define MT6358_BUCK_VCORE_DBG1 0x14a0 95 #define MT6358_BUCK_VCORE_ELR0 0x14aa 96 #define MT6358_BUCK_VGPU_CON0 0x1508 97 #define MT6358_BUCK_VGPU_DBG0 0x151e 98 #define MT6358_BUCK_VGPU_DBG1 0x1520 99 #define MT6358_BUCK_VGPU_ELR0 0x1526 100 #define MT6358_BUCK_VMODEM_CON0 0x1588 101 #define MT6358_BUCK_VMODEM_DBG0 0x159e 102 #define MT6358_BUCK_VMODEM_DBG1 0x15a0 103 #define MT6358_BUCK_VMODEM_ELR0 0x15a6 104 #define MT6358_BUCK_VDRAM1_CON0 0x1608 105 #define MT6358_BUCK_VDRAM1_DBG0 0x161e 106 #define MT6358_BUCK_VDRAM1_DBG1 0x1620 107 #define MT6358_BUCK_VDRAM1_ELR0 0x1626 108 #define MT6358_BUCK_VS1_CON0 0x1688 109 #define MT6358_BUCK_VS1_DBG0 0x169e 110 #define MT6358_BUCK_VS1_DBG1 0x16a0 111 #define MT6358_BUCK_VS1_ELR0 0x16ae 112 #define MT6358_BUCK_VS2_CON0 0x1708 113 #define MT6358_BUCK_VS2_DBG0 0x171e 114 #define MT6358_BUCK_VS2_DBG1 0x1720 115 #define MT6358_BUCK_VS2_ELR0 0x172e 116 #define MT6358_BUCK_VPA_CON0 0x1788 117 #define MT6358_BUCK_VPA_CON1 0x178a 118 #define MT6358_BUCK_VPA_ELR0 MT6358_BUCK_VPA_CON1 119 #define MT6358_BUCK_VPA_DBG0 0x1792 120 #define MT6358_BUCK_VPA_DBG1 0x1794 121 #define MT6358_VPROC_ANA_CON0 0x180c 122 #define MT6358_VCORE_VGPU_ANA_CON0 0x1828 123 #define MT6358_VMODEM_ANA_CON0 0x1888 124 #define MT6358_VDRAM1_ANA_CON0 0x1896 125 #define MT6358_VS1_ANA_CON0 0x18a2 126 #define MT6358_VS2_ANA_CON0 0x18ae 127 #define MT6358_VPA_ANA_CON0 0x18ba 128 #define MT6358_LDO_TOP_INT_CON0 0x1a50 129 #define MT6358_LDO_TOP_INT_CON1 0x1a56 130 #define MT6358_LDO_TOP_INT_STATUS0 0x1a68 131 #define MT6358_LDO_TOP_INT_STATUS1 0x1a6a 132 #define MT6358_LDO_VXO22_CON0 0x1a88 133 #define MT6358_LDO_VXO22_CON1 0x1a96 134 #define MT6358_LDO_VA12_CON0 0x1a9c 135 #define MT6358_LDO_VA12_CON1 0x1aaa 136 #define MT6358_LDO_VAUX18_CON0 0x1ab0 137 #define MT6358_LDO_VAUX18_CON1 0x1abe 138 #define MT6358_LDO_VAUD28_CON0 0x1ac4 139 #define MT6358_LDO_VAUD28_CON1 0x1ad2 140 #define MT6358_LDO_VIO28_CON0 0x1ad8 141 #define MT6358_LDO_VIO28_CON1 0x1ae6 142 #define MT6358_LDO_VIO18_CON0 0x1aec 143 #define MT6358_LDO_VIO18_CON1 0x1afa 144 #define MT6358_LDO_VDRAM2_CON0 0x1b08 145 #define MT6358_LDO_VDRAM2_CON1 0x1b16 146 #define MT6358_LDO_VEMC_CON0 0x1b1c 147 #define MT6358_LDO_VEMC_CON1 0x1b2a 148 #define MT6358_LDO_VUSB_CON0_0 0x1b30 149 #define MT6358_LDO_VUSB_CON1 0x1b40 150 #define MT6358_LDO_VSRAM_PROC11_CON0 0x1b46 151 #define MT6358_LDO_VSRAM_PROC11_DBG0 0x1b60 152 #define MT6358_LDO_VSRAM_PROC11_DBG1 0x1b62 153 #define MT6358_LDO_VSRAM_PROC11_TRACKING_CON0 0x1b64 154 #define MT6358_LDO_VSRAM_PROC11_TRACKING_CON1 0x1b66 155 #define MT6358_LDO_VSRAM_PROC11_TRACKING_CON2 0x1b68 156 #define MT6358_LDO_VSRAM_PROC11_TRACKING_CON3 0x1b6a 157 #define MT6358_LDO_VSRAM_PROC12_TRACKING_CON0 0x1b6c 158 #define MT6358_LDO_VSRAM_PROC12_TRACKING_CON1 0x1b6e 159 #define MT6358_LDO_VSRAM_PROC12_TRACKING_CON2 0x1b70 160 #define MT6358_LDO_VSRAM_PROC12_TRACKING_CON3 0x1b72 161 #define MT6358_LDO_VSRAM_WAKEUP_CON0 0x1b74 162 #define MT6358_LDO_GON1_ELR_NUM 0x1b76 163 #define MT6358_LDO_VDRAM2_ELR0 0x1b78 164 #define MT6358_LDO_VSRAM_PROC12_CON0 0x1b88 165 #define MT6358_LDO_VSRAM_PROC12_DBG0 0x1ba2 166 #define MT6358_LDO_VSRAM_PROC12_DBG1 0x1ba4 167 #define MT6358_LDO_VSRAM_OTHERS_CON0 0x1ba6 168 #define MT6358_LDO_VSRAM_OTHERS_DBG0 0x1bc0 169 #define MT6358_LDO_VSRAM_OTHERS_DBG1 0x1bc2 170 #define MT6358_LDO_VSRAM_GPU_CON0 0x1bc8 171 #define MT6358_LDO_VSRAM_GPU_DBG0 0x1be2 172 #define MT6358_LDO_VSRAM_GPU_DBG1 0x1be4 173 #define MT6358_LDO_VSRAM_CON0 0x1bee 174 #define MT6358_LDO_VSRAM_CON1 0x1bf0 175 #define MT6358_LDO_VSRAM_CON2 0x1bf2 176 #define MT6358_LDO_VSRAM_CON3 0x1bf4 177 #define MT6358_LDO_VFE28_CON0 0x1c08 178 #define MT6358_LDO_VFE28_CON1 0x1c16 179 #define MT6358_LDO_VFE28_CON2 0x1c18 180 #define MT6358_LDO_VFE28_CON3 0x1c1a 181 #define MT6358_LDO_VRF18_CON0 0x1c1c 182 #define MT6358_LDO_VRF18_CON1 0x1c2a 183 #define MT6358_LDO_VRF18_CON2 0x1c2c 184 #define MT6358_LDO_VRF18_CON3 0x1c2e 185 #define MT6358_LDO_VRF12_CON0 0x1c30 186 #define MT6358_LDO_VRF12_CON1 0x1c3e 187 #define MT6358_LDO_VRF12_CON2 0x1c40 188 #define MT6358_LDO_VRF12_CON3 0x1c42 189 #define MT6358_LDO_VEFUSE_CON0 0x1c44 190 #define MT6358_LDO_VEFUSE_CON1 0x1c52 191 #define MT6358_LDO_VEFUSE_CON2 0x1c54 192 #define MT6358_LDO_VEFUSE_CON3 0x1c56 193 #define MT6358_LDO_VCN18_CON0 0x1c58 194 #define MT6358_LDO_VCN18_CON1 0x1c66 195 #define MT6358_LDO_VCN18_CON2 0x1c68 196 #define MT6358_LDO_VCN18_CON3 0x1c6a 197 #define MT6358_LDO_VCAMA1_CON0 0x1c6c 198 #define MT6358_LDO_VCAMA1_CON1 0x1c7a 199 #define MT6358_LDO_VCAMA1_CON2 0x1c7c 200 #define MT6358_LDO_VCAMA1_CON3 0x1c7e 201 #define MT6358_LDO_VCAMA2_CON0 0x1c88 202 #define MT6358_LDO_VCAMA2_CON1 0x1c96 203 #define MT6358_LDO_VCAMA2_CON2 0x1c98 204 #define MT6358_LDO_VCAMA2_CON3 0x1c9a 205 #define MT6358_LDO_VCAMD_CON0 0x1c9c 206 #define MT6358_LDO_VCAMD_CON1 0x1caa 207 #define MT6358_LDO_VCAMD_CON2 0x1cac 208 #define MT6358_LDO_VCAMD_CON3 0x1cae 209 #define MT6358_LDO_VCAMIO_CON0 0x1cb0 210 #define MT6358_LDO_VCAMIO_CON1 0x1cbe 211 #define MT6358_LDO_VCAMIO_CON2 0x1cc0 212 #define MT6358_LDO_VCAMIO_CON3 0x1cc2 213 #define MT6358_LDO_VMC_CON0 0x1cc4 214 #define MT6358_LDO_VMC_CON1 0x1cd2 215 #define MT6358_LDO_VMC_CON2 0x1cd4 216 #define MT6358_LDO_VMC_CON3 0x1cd6 217 #define MT6358_LDO_VMCH_CON0 0x1cd8 218 #define MT6358_LDO_VMCH_CON1 0x1ce6 219 #define MT6358_LDO_VMCH_CON2 0x1ce8 220 #define MT6358_LDO_VMCH_CON3 0x1cea 221 #define MT6358_LDO_VIBR_CON0 0x1d08 222 #define MT6358_LDO_VIBR_CON1 0x1d16 223 #define MT6358_LDO_VIBR_CON2 0x1d18 224 #define MT6358_LDO_VIBR_CON3 0x1d1a 225 #define MT6358_LDO_VCN33_CON0_0 0x1d1c 226 #define MT6358_LDO_VCN33_CON0_1 0x1d2a 227 #define MT6358_LDO_VCN33_CON1 0x1d2c 228 #define MT6358_LDO_VCN33_BT_CON1 MT6358_LDO_VCN33_CON1 229 #define MT6358_LDO_VCN33_WIFI_CON1 MT6358_LDO_VCN33_CON1 230 #define MT6358_LDO_VCN33_CON2 0x1d2e 231 #define MT6358_LDO_VCN33_CON3 0x1d30 232 #define MT6358_LDO_VLDO28_CON0_0 0x1d32 233 #define MT6358_LDO_VLDO28_CON0_1 0x1d40 234 #define MT6358_LDO_VLDO28_CON1 0x1d42 235 #define MT6358_LDO_VLDO28_CON2 0x1d44 236 #define MT6358_LDO_VLDO28_CON3 0x1d46 237 #define MT6358_LDO_VSIM1_CON0 0x1d48 238 #define MT6358_LDO_VSIM1_CON1 0x1d56 239 #define MT6358_LDO_VSIM1_CON2 0x1d58 240 #define MT6358_LDO_VSIM1_CON3 0x1d5a 241 #define MT6358_LDO_VSIM2_CON0 0x1d5c 242 #define MT6358_LDO_VSIM2_CON1 0x1d6a 243 #define MT6358_LDO_VSIM2_CON2 0x1d6c 244 #define MT6358_LDO_VSIM2_CON3 0x1d6e 245 #define MT6358_LDO_VCN28_CON0 0x1d88 246 #define MT6358_LDO_VCN28_CON1 0x1d96 247 #define MT6358_LDO_VCN28_CON2 0x1d98 248 #define MT6358_LDO_VCN28_CON3 0x1d9a 249 #define MT6358_VRTC28_CON0 0x1d9c 250 #define MT6358_LDO_VBIF28_CON0 0x1d9e 251 #define MT6358_LDO_VBIF28_CON1 0x1dac 252 #define MT6358_LDO_VBIF28_CON2 0x1dae 253 #define MT6358_LDO_VBIF28_CON3 0x1db0 254 #define MT6358_VCAMA1_ANA_CON0 0x1e08 255 #define MT6358_VCAMA2_ANA_CON0 0x1e0c 256 #define MT6358_VCN33_ANA_CON0 0x1e28 257 #define MT6358_VSIM1_ANA_CON0 0x1e2c 258 #define MT6358_VSIM2_ANA_CON0 0x1e30 259 #define MT6358_VUSB_ANA_CON0 0x1e34 260 #define MT6358_VEMC_ANA_CON0 0x1e38 261 #define MT6358_VLDO28_ANA_CON0 0x1e3c 262 #define MT6358_VIO28_ANA_CON0 0x1e40 263 #define MT6358_VIBR_ANA_CON0 0x1e44 264 #define MT6358_VMCH_ANA_CON0 0x1e48 265 #define MT6358_VMC_ANA_CON0 0x1e4c 266 #define MT6358_VRF18_ANA_CON0 0x1e88 267 #define MT6358_VCN18_ANA_CON0 0x1e8c 268 #define MT6358_VCAMIO_ANA_CON0 0x1e90 269 #define MT6358_VIO18_ANA_CON0 0x1e94 270 #define MT6358_VEFUSE_ANA_CON0 0x1e98 271 #define MT6358_VRF12_ANA_CON0 0x1e9c 272 #define MT6358_VSRAM_PROC11_ANA_CON0 0x1ea0 273 #define MT6358_VSRAM_PROC12_ANA_CON0 0x1ea4 274 #define MT6358_VSRAM_OTHERS_ANA_CON0 0x1ea6 275 #define MT6358_VSRAM_GPU_ANA_CON0 0x1ea8 276 #define MT6358_VDRAM2_ANA_CON0 0x1eaa 277 #define MT6358_VCAMD_ANA_CON0 0x1eae 278 #define MT6358_VA12_ANA_CON0 0x1eb2 279 #define MT6358_AUD_TOP_INT_CON0 0x2228 280 #define MT6358_AUD_TOP_INT_STATUS0 0x2234 281 282 #endif /* __MFD_MT6358_REGISTERS_H__ */ 283
