Searched refs:MPS (Results 1 – 13 of 13) sorted by relevance
198 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe202 The following choices set the MPS and MRRS optimization strategy215 Use the BIOS defaults; don't touch MPS at all. This is the same222 Default choice; ensure that the MPS matches upstream bridge.228 Use largest MPS that boot-time devices support. If you have a230 will use the largest MPS that's supported by all devices. This237 Use MPS and MRRS for best performance. Ensure that a given238 device's MPS is no larger than its parent MPS, which allows us to239 keep all switches/bridges to the max MPS supported by their246 Set MPS = 128 for all devices. MPS configuration effected by the[all …]
105 T4VF_MOD_MAP(MPS, 0, MPS_VF_CTL, MPS_VF_STAT_RX_VF_ERR_FRAMES_H)
8 * MPS MP1225419 This driver implements support for Monolithic Power Systems, Inc. (MPS)
78 #define MPS 1 macro
111 1. If C0/C4/C5 run at x1/x2 link widths (irrespective of speed and MPS)113 a) speed is Gen-2 and MPS is 256B114 b) speed is >= Gen-3 with any MPS
215 tristate "MPS MP2975"217 If you say yes here you get hardware monitoring support for MPS
63 Under "SDK Resources" => "Intel(R) vPro(TM) Gateway (MPS)"
351 case MPS: in mpoa_device_type_string()423 if ((mpoa_device_type == MPS || mpoa_device_type == MPC) && in lane2_assoc_ind()428 if (mpoa_device_type != MPS && in lane2_assoc_ind()
25 MultiProcessor Specification (MPS), and the Advanced Power
669 tristate "MPS MP8859 regulator driver"680 tristate "MPS MP8869 regulator driver"
3704 pcie_bus_tune_off Disable PCIe MPS (Max Payload Size)3705 tuning and use the BIOS-configured MPS defaults.3706 pcie_bus_safe Set every device's MPS to the largest value3708 pcie_bus_perf Set device MPS to the largest allowable MPS3711 value (no larger than the MPS that the device3713 pcie_bus_peer2peer Set every device's MPS to 128B, which
2312 set the SMP (or MPS) version on BIOS to 1.1 instead of
444 bool "Enable MPS table" if ACPI || SFI
