Home
last modified time | relevance | path

Searched refs:MMC_TIMING_UHS_DDR50 (Results 1 – 25 of 33) sorted by relevance

12

/Linux-v5.10/include/linux/mmc/
Dhost.h59 #define MMC_TIMING_UHS_DDR50 7 macro
578 card->host->ios.timing <= MMC_TIMING_UHS_DDR50; in mmc_card_uhs()
/Linux-v5.10/drivers/mmc/host/
Dsdhci-of-arasan.c614 case MMC_TIMING_UHS_DDR50: in sdhci_zynqmp_sdcardclk_set_phase()
682 case MMC_TIMING_UHS_DDR50: in sdhci_zynqmp_sampleclk_set_phase()
741 case MMC_TIMING_UHS_DDR50: in sdhci_versal_sdcardclk_set_phase()
807 case MMC_TIMING_UHS_DDR50: in sdhci_versal_sampleclk_set_phase()
1069 arasan_dt_read_clk_phase(dev, clk_data, MMC_TIMING_UHS_DDR50, in arasan_dt_parse_clk_phases()
Dsdhci-of-dwcmshc.c70 else if ((timing == MMC_TIMING_UHS_DDR50) || in dwcmshc_set_uhs_signaling()
Ddw_mmc-hi3798cv200.c39 ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798cv200_set_ios()
Dsdhci-pxav3.c268 case MMC_TIMING_UHS_DDR50: in pxav3_set_uhs_signaling()
281 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling()
Dsdhci-xenon.c208 else if ((timing == MMC_TIMING_UHS_DDR50) || in xenon_set_uhs_signaling()
353 if (host->timing == MMC_TIMING_UHS_DDR50 || in xenon_execute_tuning()
Dsdhci-xenon-phy.c620 case MMC_TIMING_UHS_DDR50: in xenon_emmc_phy_set()
750 case MMC_TIMING_UHS_DDR50: in xenon_hs_delay_adj()
Drtsx_pci_sdmmc.c986 case MMC_TIMING_UHS_DDR50: in sd_set_timing()
1067 case MMC_TIMING_UHS_DDR50: in sdmmc_set_ios()
1287 case MMC_TIMING_UHS_DDR50: in sdmmc_execute_tuning()
1302 else if (mmc->ios.timing == MMC_TIMING_UHS_DDR50) in sdmmc_execute_tuning()
Dsdhci-brcmstb.c89 else if ((timing == MMC_TIMING_UHS_DDR50) || in sdhci_brcmstb_set_uhs_signaling()
Dsdhci-pci-arasan.c284 case MMC_TIMING_UHS_DDR50: in arasan_select_phy_clock()
Dsdhci-st.c291 case MMC_TIMING_UHS_DDR50: in sdhci_st_set_uhs_signaling()
Dsdhci-esdhc-imx.c981 if (host->timing == MMC_TIMING_UHS_DDR50) in usdhc_execute_tuning()
1089 case MMC_TIMING_UHS_DDR50: in esdhc_change_pinstate()
1198 case MMC_TIMING_UHS_DDR50: in esdhc_set_uhs_signaling()
Ddw_mmc-exynos.c320 case MMC_TIMING_UHS_DDR50: in dw_mci_exynos_set_ios()
Dmmci_stm32_sdmmc.c200 host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) in mmci_sdmmc_set_clkreg()
Dsdhci-omap.c778 if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) in sdhci_omap_set_uhs_signaling()
1022 pinctrl_state[MMC_TIMING_UHS_DDR50] = state; in sdhci_omap_config_iodelay_pinctrl_state()
Dusdhi6rol0.c750 if (ios->timing != MMC_TIMING_UHS_DDR50) { in usdhi6_clk_set()
853 if (ios->timing == MMC_TIMING_UHS_DDR50) in usdhi6_set_ios()
860 mode = ios->timing == MMC_TIMING_UHS_DDR50; in usdhi6_set_ios()
Dsdhci-sprd.c331 case MMC_TIMING_UHS_DDR50: in sdhci_sprd_set_uhs_signaling()
Dowl-mmc.c524 if (ios->timing == MMC_TIMING_UHS_DDR50) { in owl_mmc_set_ios()
Drtsx_usb_sdmmc.c1061 case MMC_TIMING_UHS_DDR50: in sd_set_timing()
1127 case MMC_TIMING_UHS_DDR50: in sdmmc_set_ios()
Dsunxi-mmc.c736 if (ios->timing != MMC_TIMING_UHS_DDR50 && in sunxi_mmc_clk_set_phase()
886 if (ios->timing == MMC_TIMING_UHS_DDR50 || in sunxi_mmc_set_clk()
Dsdhci_am654.c126 [MMC_TIMING_UHS_DDR50] = {"ti,otap-del-sel-ddr50",
Dsdhci.c1829 case MMC_TIMING_UHS_DDR50: in sdhci_get_preset_value()
2229 else if ((timing == MMC_TIMING_UHS_DDR50) || in sdhci_set_uhs_signaling()
2304 ios->timing == MMC_TIMING_UHS_DDR50 || in sdhci_set_ios()
2369 (ios->timing == MMC_TIMING_UHS_DDR50) || in sdhci_set_ios()
2824 case MMC_TIMING_UHS_DDR50: in sdhci_execute_tuning()
/Linux-v5.10/drivers/mmc/core/
Ddebugfs.c140 case MMC_TIMING_UHS_DDR50: in mmc_ios_show()
Dsd.c472 timing = MMC_TIMING_UHS_DDR50; in sd_set_bus_speed_mode()
644 card->host->ios.timing == MMC_TIMING_UHS_DDR50 || in mmc_sd_init_uhs_card()
655 if (err && card->host->ios.timing == MMC_TIMING_UHS_DDR50) { in mmc_sd_init_uhs_card()
/Linux-v5.10/drivers/staging/greybus/
Dsdio.c666 case MMC_TIMING_UHS_DDR50: in gb_mmc_set_ios()

12