/Linux-v5.10/drivers/net/ethernet/chelsio/cxgb3/ |
D | aq100x.c | 71 int err = t3_phy_reset(phy, MDIO_MMD_VEND1, 3000); in aq100x_reset() 86 err = t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, IMASK_GLOBAL); in aq100x_intr_enable() 92 return t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, 0); in aq100x_intr_disable() 99 t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &v); in aq100x_intr_clear() 110 err = t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &cause); in aq100x_intr_handler() 292 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); in t3_aq100x_phy_prep() 319 t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_FW_VERSION, &v); in t3_aq100x_phy_prep() 328 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); in t3_aq100x_phy_prep() 332 err = t3_mdio_change_bits(phy, MDIO_MMD_VEND1, MDIO_CTRL1, in t3_aq100x_phy_prep()
|
/Linux-v5.10/drivers/net/ethernet/aquantia/atlantic/macsec/ |
D | macsec_api.c | 83 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record() 86 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record() 94 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record() 97 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record() 108 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record() 111 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, MSS_INGRESS_LUT_CTL_REGISTER_ADDR, in set_raw_ingress_record() 137 ret = aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in get_raw_ingress_record() 142 ret = aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in get_raw_ingress_record() 151 ret = aq_mss_mdio_read(hw, MDIO_MMD_VEND1, in get_raw_ingress_record() 157 ret = aq_mss_mdio_read(hw, MDIO_MMD_VEND1, in get_raw_ingress_record() [all …]
|
/Linux-v5.10/drivers/net/phy/ |
D | adin.c | 224 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rgmii_mode() 228 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode() 260 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rgmii_mode() 270 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rmii_mode() 274 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode() 287 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rmii_mode() 462 if (devad == MDIO_MMD_VEND1) in adin_cl45_to_adin_reg() 622 rc = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset() 631 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset() 658 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1); in adin_read_mmd_stat_regs() [all …]
|
D | aquantia_main.c | 254 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_STD_MASK, in aqr_config_intr() 259 return phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_VEND_MASK, in aqr_config_intr() 439 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in aqr107_wait_reset_complete() 449 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_chip_info() 456 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT1); in aqr107_chip_info() 550 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT9); in aqr107_link_change_notify() 561 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_suspend() 567 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_resume()
|
D | teranetics.c | 39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done() 54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status()
|
D | aquantia_hwmon.c | 58 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get() 79 return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp); in aqr_hwmon_set() 84 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
|
D | bcm84881.c | 197 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); in bcm84881_read_status()
|
D | phy_device.c | 739 if (i == MDIO_MMD_VEND1 || i == MDIO_MMD_VEND2) { in get_phy_c45_ids() 777 if (i == MDIO_MMD_VEND1 || i == MDIO_MMD_VEND2) { in get_phy_c45_ids()
|
/Linux-v5.10/drivers/net/ethernet/aquantia/atlantic/ |
D | aq_phy.c | 165 val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1, in aq_phy_disable_ptp() 168 aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1, in aq_phy_disable_ptp()
|
/Linux-v5.10/include/uapi/linux/ |
D | mdio.h | 27 #define MDIO_MMD_VEND1 30 /* Vendor specific 1 */ macro 135 #define MDIO_DEVS_VEND1 MDIO_DEVS_PRESENT(MDIO_MMD_VEND1)
|
/Linux-v5.10/drivers/net/ethernet/intel/ixgbe/ |
D | ixgbe_x550.c | 2338 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em() 2346 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em() 2355 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em() 2370 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em() 2450 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em() 2459 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em() 2466 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em() 2475 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em() 2482 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em() 2490 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em() [all …]
|
D | ixgbe_phy.c | 1169 MDIO_MMD_VEND1, in ixgbe_check_phy_link_tnx() 2650 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, ®); in ixgbe_set_copper_phy_power() 2662 status = hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, reg); in ixgbe_set_copper_phy_power()
|