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Searched refs:MCFSIM_ICR_PRI0 (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/arch/m68k/coldfire/
Dm525x.c59 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m525x_qspi_init()
71 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m525x_i2c_init()
Dm5249.c85 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m5249_qspi_init()
99 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5249_i2c_init()
Dm5407.c48 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5407_i2c_init()
Dm5206.c48 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5206_i2c_init()
Dm5307.c57 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5307_i2c_init()
/Linux-v5.10/arch/m68k/include/asm/
Dmcfintc.h41 #define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */ macro