Searched refs:MASTER_COMM_DATA_REG1 (Results 1 – 5 of 5) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_dmcu.h | 38 SR(MASTER_COMM_DATA_REG1), \
56 SR(MASTER_COMM_DATA_REG1), \
73 SR(MASTER_COMM_DATA_REG1), \
209 uint32_t MASTER_COMM_DATA_REG1; member
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| D | dce_dmcu.c | 246 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), in dce_dmcu_setup_psr()
311 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); in dce_psr_wait_loop()
363 REG_WRITE(MASTER_COMM_DATA_REG1, fractional_pwm); in dcn10_dmcu_enable_fractional_pwm()
413 REG_WRITE(MASTER_COMM_DATA_REG1, 0xFFFF); in dcn10_dmcu_init()
685 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), in dcn10_dmcu_setup_psr()
737 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); in dcn10_psr_wait_loop()
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| D | dce_abm.c | 70 REG_WRITE(MASTER_COMM_DATA_REG1, rampingBoundary); in dce_abm_set_pipe()
115 REG_WRITE(MASTER_COMM_DATA_REG1, frame_ramp); in dmcu_set_backlight_level()
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| D | dce_abm.h | 35 SR(MASTER_COMM_DATA_REG1)
223 uint32_t MASTER_COMM_DATA_REG1; member
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| D | dce_link_encoder.h | 148 uint32_t MASTER_COMM_DATA_REG1; member
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