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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7608 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x02000000L macro
Ddce_8_0_sh_mask.h3197 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
Ddce_10_0_sh_mask.h3119 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
Ddce_11_0_sh_mask.h3189 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
Ddce_11_2_sh_mask.h3437 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
Ddce_12_0_sh_mask.h9267 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h43250 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK … macro
Ddcn_1_0_sh_mask.h40016 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK … macro
Ddcn_3_0_0_sh_mask.h49127 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK … macro
Ddcn_2_0_0_sh_mask.h48759 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK … macro