Searched refs:IVTV_REG_DMASTATUS (Results 1 – 2 of 2) sorted by relevance
544 if (read_reg(IVTV_REG_DMASTATUS) & 0x14) { in ivtv_irq_dma_read()546 read_reg(IVTV_REG_DMASTATUS), in ivtv_irq_dma_read()548 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_dma_read()611 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_irq_enc_dma_complete()676 status = read_reg(IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()690 write_reg(status, IVTV_REG_DMASTATUS); in ivtv_irq_dma_err()1071 IVTV_ERR("DMA TIMEOUT %08x %d\n", read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); in ivtv_unfinished_dma()1073 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); in ivtv_unfinished_dma()
100 #define IVTV_REG_DMASTATUS (0x0004) macro
