| /Linux-v5.10/drivers/pinctrl/renesas/ |
| D | pfc-r8a77970.c | 37 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
172 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(HRX0) F_(0, 0) FM(A19) FM(IRQ3) F_(0, 0) F_(0, 0) … macro
262 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
462 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
463 PINMUX_IPSR_GPSR(IP2_15_12, HRX0),
464 PINMUX_IPSR_GPSR(IP2_15_12, A19),
465 PINMUX_IPSR_GPSR(IP2_15_12, IRQ3),
2365 IP2_15_12
|
| D | pfc-r8a77980.c | 38 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
205 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(MSIOF3_SS2) FM(GETHER_PHY_INT_B) FM(A19) FM(FXR_TXE… macro
313 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
544 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
545 PINMUX_IPSR_GPSR(IP2_15_12, MSIOF3_SS2),
546 PINMUX_IPSR_MSEL(IP2_15_12, GETHER_PHY_INT_B, SEL_GETHER_1),
547 PINMUX_IPSR_GPSR(IP2_15_12, A19),
548 PINMUX_IPSR_GPSR(IP2_15_12, FXR_TXENA_N),
2787 IP2_15_12
|
| D | pfc-r8a77995.c | 65 #define GPSR1_12 F_(DU_DG4, IP2_15_12)
218 #define IP2_15_12 FM(DU_DG4) FM(LCDOUT12) FM(HSCK3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
352 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
598 PINMUX_IPSR_GPSR(IP2_15_12, DU_DG4),
599 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT12),
600 PINMUX_IPSR_MSEL(IP2_15_12, HSCK3_B, SEL_HSCIF3_1),
2646 IP2_15_12
|
| D | pfc-r8a7779.c | 760 PINMUX_IPSR_MSEL(IP2_15_12, HRTS0, SEL_HSCIF0_0),
761 PINMUX_IPSR_MSEL(IP2_15_12, RTS1_TANS, SEL_SCIF1_0),
762 PINMUX_IPSR_GPSR(IP2_15_12, MDATA),
763 PINMUX_IPSR_GPSR(IP2_15_12, TX0_C),
764 PINMUX_IPSR_GPSR(IP2_15_12, SUB_TMS),
765 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE1),
766 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE9),
767 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE17),
768 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE25),
769 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE33),
|
| D | pfc-r8a77990.c | 116 #define GPSR2_22 F_(BS_N, IP2_15_12)
233 #define IP2_15_12 FM(BS_N) FM(PWM0_A) FM(AVB_MAGIC) FM(VI4_CLK) F_(0, 0) FM(TX3_C) F_(0, 0) FM… macro
389 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
623 PINMUX_IPSR_GPSR(IP2_15_12, BS_N),
624 PINMUX_IPSR_MSEL(IP2_15_12, PWM0_A, SEL_PWM0_0),
625 PINMUX_IPSR_GPSR(IP2_15_12, AVB_MAGIC),
626 PINMUX_IPSR_GPSR(IP2_15_12, VI4_CLK),
627 PINMUX_IPSR_GPSR(IP2_15_12, TX3_C),
628 PINMUX_IPSR_MSEL(IP2_15_12, VI5_CLK_B, SEL_VIN5_1),
4793 IP2_15_12
|
| D | pfc-r8a77950.c | 123 #define GPSR1_4 F_(A4, IP2_15_12)
275 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
439 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
758 PINMUX_IPSR_GPSR(IP2_15_12, A4),
759 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
760 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
761 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
762 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
763 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5054 IP2_15_12
|
| D | pfc-r8a77951.c | 124 #define GPSR1_4 F_(A4, IP2_15_12)
276 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
449 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
765 PINMUX_IPSR_GPSR(IP2_15_12, A4),
766 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
767 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
768 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
769 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
770 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5415 IP2_15_12
|
| D | pfc-r8a7796.c | 128 #define GPSR1_4 F_(A4, IP2_15_12)
278 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
453 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
768 PINMUX_IPSR_GPSR(IP2_15_12, A4),
769 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
770 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
771 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
772 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
773 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5367 IP2_15_12
|
| D | pfc-r8a77965.c | 129 #define GPSR1_4 F_(A4, IP2_15_12)
279 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
454 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
771 PINMUX_IPSR_GPSR(IP2_15_12, A4),
772 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
773 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
774 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
775 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
776 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5621 IP2_15_12
|
| D | pfc-r8a77470.c | 619 PINMUX_IPSR_GPSR(IP2_15_12, D9),
620 PINMUX_IPSR_GPSR(IP2_15_12, HRTS2_N),
621 PINMUX_IPSR_MSEL(IP2_15_12, TX1_C, SEL_SCIF1_2),
622 PINMUX_IPSR_MSEL(IP2_15_12, SDA1_D, SEL_I2C01_3),
|
