Home
last modified time | relevance | path

Searched refs:IP0_19_16 (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/drivers/pinctrl/renesas/
Dpfc-r8a77970.c52 #define GPSR0_4 F_(DU_DR6, IP0_19_16)
157 #define IP0_19_16 FM(DU_DR6) FM(MSIOF3_RXD) F_(0, 0) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
263 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
400 PINMUX_IPSR_GPSR(IP0_19_16, DU_DR6),
401 PINMUX_IPSR_GPSR(IP0_19_16, MSIOF3_RXD),
402 PINMUX_IPSR_GPSR(IP0_19_16, A4),
2344 IP0_19_16
Dpfc-r8a77980.c53 #define GPSR0_4 F_(DU_DR6, IP0_19_16)
190 #define IP0_19_16 FM(DU_DR6) FM(RTS4_N) FM(GETHER_RMII_TXD_EN) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0… macro
314 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
472 PINMUX_IPSR_GPSR(IP0_19_16, DU_DR6),
473 PINMUX_IPSR_GPSR(IP0_19_16, RTS4_N),
474 PINMUX_IPSR_GPSR(IP0_19_16, GETHER_RMII_TXD_EN),
475 PINMUX_IPSR_GPSR(IP0_19_16, A4),
2766 IP0_19_16
Dpfc-r8a77995.c37 #define GPSR0_6 F_(MLB_CLK, IP0_19_16)
203 #define IP0_19_16 FM(MLB_CLK) FM(MSIOF2_SYNC_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
353 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
535 PINMUX_IPSR_GPSR(IP0_19_16, MLB_CLK),
536 PINMUX_IPSR_MSEL(IP0_19_16, MSIOF2_SYNC_A, SEL_MSIOF2_0),
537 PINMUX_IPSR_MSEL(IP0_19_16, SCK5_A, SEL_SCIF5_0),
2625 IP0_19_16
Dpfc-r8a77951.c132 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
259 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST… macro
450 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
663 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
664 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
665 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
666 PINMUX_IPSR_MSEL(IP0_19_16, FSCLKST2_N_A, I2C_SEL_5_0),
667 PINMUX_IPSR_PHYS(IP0_19_16, SCL5, I2C_SEL_5_1),
5394 IP0_19_16
Dpfc-r8a77965.c137 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
264 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST… macro
455 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
668 PINMUX_IPSR_GPSR(IP0_19_16, FSCLKST2_N_A),
670 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
671 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
672 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
673 PINMUX_IPSR_PHYS(IP0_19_16, SCL5, I2C_SEL_5_1),
5600 IP0_19_16
Dpfc-r8a77950.c131 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
258 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F… macro
440 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
658 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
659 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
660 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
661 PINMUX_IPSR_PHYS(IP0_19_16, SCL5, I2C_SEL_5_1),
5033 IP0_19_16
Dpfc-r8a7796.c136 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
263 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F… macro
454 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
668 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
669 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
670 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
671 PINMUX_IPSR_PHYS(IP0_19_16, SCL5, I2C_SEL_5_1),
5346 IP0_19_16
Dpfc-r8a7790.c829 PINMUX_IPSR_GPSR(IP0_19_16, D5),
830 PINMUX_IPSR_MSEL(IP0_19_16, SCIFB1_TXD_F, SEL_SCIFB1_5),
831 PINMUX_IPSR_MSEL(IP0_19_16, SCIFB0_TXD_C, SEL_SCIFB_2),
832 PINMUX_IPSR_MSEL(IP0_19_16, VI3_DATA5, SEL_VI3_0),
833 PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1, SEL_VI0_0),
834 PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1_B, SEL_VI0_1),
835 PINMUX_IPSR_MSEL(IP0_19_16, TX0_B, SEL_SCIF0_1),
Dpfc-r8a77990.c134 #define GPSR2_4 F_(QSPI0_IO3, IP0_19_16)
218 #define IP0_19_16 FM(QSPI0_IO3) FM(HRX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
390 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
566 PINMUX_IPSR_GPSR(IP0_19_16, QSPI0_IO3),
567 PINMUX_IPSR_MSEL(IP0_19_16, HRX4_A, SEL_HSCIF4_0),
4772 IP0_19_16
Dpfc-r8a77470.c555 PINMUX_IPSR_GPSR(IP0_19_16, SD0_DAT2),
556 PINMUX_IPSR_MSEL(IP0_19_16, SSI_WS0129_B, SEL_SSI0_1),
557 PINMUX_IPSR_MSEL(IP0_19_16, RX5_E, SEL_SCIF5_4),