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Searched refs:IOADDR (Results 1 – 25 of 26) sorted by relevance

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/Linux-v5.10/arch/mips/sibyte/common/
Dsb_tbprof.c152 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1)); in arm_tb()
153 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); in arm_tb()
164 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0)); in arm_tb()
169 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1)); in arm_tb()
176 IOADDR(A_SCD_PERF_CNT_CFG)); in arm_tb()
178 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1)); in arm_tb()
180 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in arm_tb()
185 __raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG)); in arm_tb()
200 IOADDR(A_SCD_TRACE_CFG)); in sbprof_tb_intr()
206 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr()
[all …]
Dbus_watcher.c73 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); in check_bus_watcher()
77 status = csr_in32(IOADDR(A_BCM1480_BUS_ERR_STATUS_DEBUG)); in check_bus_watcher()
87 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); in check_bus_watcher()
88 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); in check_bus_watcher()
161 csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bw_int()
162 csr_out32(M_SCD_TRACE_CFG_START_READ, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bw_int()
166 (long long)__raw_readq(IOADDR(A_SCD_TRACE_READ))); in sibyte_bw_int()
168 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bw_int()
169 csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bw_int()
173 stats->status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); in sibyte_bw_int()
[all …]
/Linux-v5.10/arch/mips/sibyte/sb1250/
Dirq.c47 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + in sb1250_mask_irq()
50 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + in sb1250_mask_irq()
61 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + in sb1250_unmask_irq()
64 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + in sb1250_unmask_irq()
88 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(old_cpu) + in sb1250_set_affinity()
94 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(old_cpu) + in sb1250_set_affinity()
100 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + in sb1250_set_affinity()
103 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + in sb1250_set_affinity()
139 pending = __raw_readq(IOADDR(A_IMR_REGISTER(sb1250_irq_owner[irq], in ack_sb1250_irq()
156 IOADDR(A_IMR_REGISTER(cpu, in ack_sb1250_irq()
[all …]
Dsmp.c21 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),
22 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU)
26 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
27 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)
31 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
32 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
Dsetup.c175 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); in sb1250_setup()
184 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in sb1250_setup()
/Linux-v5.10/arch/mips/sibyte/bcm1480/
Dsmp.c26 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
27 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
28 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
29 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
33 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
34 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
35 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
36 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
40 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
41 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
[all …]
Dirq.c53 …cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_sp… in bcm1480_mask_irq()
55 …____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_sp… in bcm1480_mask_irq()
70 …cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_sp… in bcm1480_unmask_irq()
72 …____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_sp… in bcm1480_unmask_irq()
101 …cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (… in bcm1480_set_affinity()
106 …____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (… in bcm1480_set_affinity()
111 …cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BC… in bcm1480_set_affinity()
113 …____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BC… in bcm1480_set_affinity()
157 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], in ack_bcm1480_irq()
168 __raw_writeq(pending, IOADDR(A_BCM1480_IMR_REGISTER(cpu_logical_map(i), in ack_bcm1480_irq()
[all …]
Dsetup.c112 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); in bcm1480_setup()
122 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in bcm1480_setup()
/Linux-v5.10/arch/mips/kernel/
Dcevt-sb1250.c33 cfg = IOADDR(A_SCD_TIMER_REGISTER(smp_processor_id(), R_SCD_TIMER_CFG)); in sibyte_shutdown()
46 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); in sibyte_set_periodic()
47 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); in sibyte_set_periodic()
61 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); in sibyte_next_event()
62 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); in sibyte_next_event()
84 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); in sibyte_counter_handler()
130 IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) + in sb1250_clockevent_init()
Dcevt-bcm1480.c36 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); in sibyte_set_periodic()
37 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); in sibyte_set_periodic()
50 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); in sibyte_shutdown()
62 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); in sibyte_next_event()
63 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); in sibyte_next_event()
85 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); in sibyte_counter_handler()
130 IOADDR(A_BCM1480_IMR_REGISTER(cpu, in sb1480_clockevent_init()
Dcsrc-sb1250.c29 addr = IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)); in sb1250_hpt_get_cycles()
59 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, in sb1250_clocksource_init()
62 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, in sb1250_clocksource_init()
65 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, in sb1250_clocksource_init()
Dcsrc-bcm1480.c21 return (u64) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); in bcm1480_hpt_read()
34 return __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); in sb1480_read_sched_clock()
43 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in sb1480_clocksource_init()
/Linux-v5.10/arch/xtensa/platforms/xt2000/include/platform/
Dserial.h22 #define DUART16552_1_ADDR IOADDR(0x0d050020) /* channel 1 */
23 #define DUART16552_2_ADDR IOADDR(0x0d050000) /* channel 2 */
Dhardware.h25 #define SONIC83934_ADDR IOADDR(0x0d030000)
41 #define XT2000_LED_ADDR IOADDR(0x0d040000)
/Linux-v5.10/arch/mips/mm/
Dcerr-sb1.c139 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); in check_bus_watcher()
142 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); in check_bus_watcher()
144 l2_tag = in64(IOADDR(A_L2_ECC_TAG)); in check_bus_watcher()
146 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); in check_bus_watcher()
172 csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG)); in sb1_cache_error()
Dpage.c641 __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); in clear_page()
647 while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG))) in clear_page()
650 __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); in clear_page()
668 __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); in copy_page()
674 while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG))) in copy_page()
677 __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); in copy_page()
/Linux-v5.10/arch/xtensa/platforms/xtfpga/include/platform/
Dhardware.h40 #define XTFPGA_FPGAREGS_VADDR IOADDR(0x0D020000)
/Linux-v5.10/arch/mips/include/asm/sibyte/
Dsb1250.h53 #define IOADDR(a) ((void __iomem *)(IO_BASE + (a))) macro
/Linux-v5.10/arch/xtensa/include/asm/
Dio.h22 #define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x)) macro
/Linux-v5.10/arch/xtensa/platforms/xtfpga/
Dlcd.c21 #define LCD_INSTR_ADDR ((char *)IOADDR(CONFIG_XTFPGA_LCD_BASE_ADDR))
/Linux-v5.10/arch/mips/sibyte/swarm/
Dsetup.c162 reg = IOADDR(LEDS_PHYS) + 0x20 + ((3 - i) << 3); in setleds()
Drtc_m41t81.c81 #define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
Drtc_xicor1241.c56 #define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
/Linux-v5.10/arch/mips/pci/
Dpci-sb1250.c219 reg = __raw_readq(IOADDR(A_SCD_SYSTEM_CFG)); in sb1250_pcibios_init()
Dpci-bcm1480.c210 reg = __raw_readq(IOADDR(A_SCD_SYSTEM_CFG)); in bcm1480_pcibios_init()

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