Searched refs:INVALIDATE_ALL_L1_TLBS (Results 1 – 18 of 18) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | gfxhub_v1_0.c | 157 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v1_0_init_cache_regs()
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| D | gfxhub_v2_0.c | 230 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v2_0_init_cache_regs()
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| D | gfxhub_v2_1.c | 230 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v2_1_init_cache_regs()
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| D | mmhub_v2_0.c | 276 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v2_0_init_cache_regs()
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| D | mmhub_v1_0.c | 177 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v1_0_init_cache_regs()
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| D | gmc_v7_0.c | 642 tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v7_0_gart_enable()
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| D | gmc_v8_0.c | 869 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v8_0_gart_enable()
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| D | sid.h | 380 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | mmhub_v9_4.c | 230 INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v9_4_init_cache_regs()
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| /Linux-v5.10/drivers/gpu/drm/radeon/ |
| D | rv770d.h | 648 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | nid.h | 118 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | sid.h | 379 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | cikd.h | 497 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | evergreend.h | 1156 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | r600d.h | 593 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | ni.c | 1300 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cayman_pcie_gart_enable()
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| D | si.c | 4311 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in si_pcie_gart_enable()
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| D | cik.c | 5455 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cik_pcie_gart_enable()
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