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Searched refs:ICP_QAT_UCLO_MAX_CTX (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.10/drivers/crypto/qat/qat_common/
Dicp_qat_uclo.h10 #define ICP_QAT_UCLO_MAX_CTX 8 macro
11 #define ICP_QAT_UCLO_MAX_UIMAGE (ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX)
113 struct icp_qat_uclo_page *cur_page[ICP_QAT_UCLO_MAX_CTX];
116 unsigned int new_uaddr[ICP_QAT_UCLO_MAX_CTX];
122 struct icp_qat_uclo_aeslice ae_slices[ICP_QAT_UCLO_MAX_CTX];
Dqat_hal.c290 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_wr_indr_csr()
321 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_put_sig_event()
337 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_put_wakeup_event()
1302 } while (ctx_mask && (ctx++ < ICP_QAT_UCLO_MAX_CTX)); in qat_hal_init_gpr()
1337 } while (ctx_mask && (ctx++ < ICP_QAT_UCLO_MAX_CTX)); in qat_hal_init_wr_xfer()
1372 } while (ctx_mask && (ctx++ < ICP_QAT_UCLO_MAX_CTX)); in qat_hal_init_rd_xfer()
1387 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_init_nn()
Dqat_uclo.c799 ICP_QAT_UCLO_MAX_CTX) in qat_uclo_init_reg_sym()
885 ICP_QAT_UCLO_MAX_CTX); s++) { in qat_uclo_set_ae_mode()
959 ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX); in qat_uclo_parse_uof_obj()
1554 if (ICP_QAT_CTX_MODE(image->ae_mode) == ICP_QAT_UCLO_MAX_CTX) in qat_uclo_wr_uimage_page()
1577 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) in qat_uclo_wr_uimage_page()